HD6432646 Hitachi, HD6432646 Datasheet - Page 858
HD6432646
Manufacturer Part Number
HD6432646
Description
(HD64F264x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
1.HD6432646.pdf
(1155 pages)
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A.4
The tables in this section can be used to calculate the number of states required for instruction
execution by the CPU. Table A-5 indicates the number of instruction fetch, data read/write, and
other cycles occurring in each instruction. Table A-4 indicates the number of states required for
each cycle. The number of states required for execution of an instruction can be calculated from
these two tables as follows:
Examples: Advanced mode, program code and stack located in external memory, on-chip
supporting modules accessed in two states with 8-bit bus width, external devices accessed in three
states with one wait state and 16-bit bus width.
1. BSET #0, @FFFFC7:8
2. JSR @@30
824
From table A-5:
I = L = 2, J = K = M = N = 0
From table A-4:
S
Number of states required for execution = 2
From table A-5:
I = J = K = 2, L = M = N = 0
From table A-4:
S
Number of states required for execution = 2
Execution states = I
I
I
= 4, S
= S
J
Number of States Required for Instruction Execution
= S
L
K
= 2
= 4
S
I
+ J S
J
+ K S
K
+ L S
4 + 2 2 = 12
4 + 2 4 + 2 4 = 24
L
+ M S
M
+ N S
N
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