HD6432646 Hitachi, HD6432646 Datasheet - Page 650

• Manufacturer Part Number: HD6432646
• Description: (HD64F264x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

17.2
17.2.1
Note: * Only 0 can be written, to clear the flag.
PWCR is an 8-bit read/write register that performs interrupt enabling, starting/stopping, and
counter (PWCNT) clock selection. It also contains a flag that indicates a compare match with the
cycle register (PWCYR). PWCR1 is the channel 1 register, and PWCR2 is the channel 2 register.
PWCR is initialized to H'C0 upon reset, and in standby mode, watch mode, subactive mode,
subsleep mode, and module stop mode.
Bits 7 and 6—Reserved: Bits 7 and 6 are reserved; they are always read as 1 and cannot be
modified.
Bit 5—Interrupt Enable (IE): Bit 5 selects enabling or disabling of an interrupt in the event of a
compare match with the PWCYR register for the corresponding channel.
Bit 5: IE
0
1
Bit 4—Compare Match Flag (CMF): Bit 4 indicates the occurrence of a compare match with the
PWCYR register for the corresponding channel.
Bit 4: CMF
0
1
616
Bit
Initial value
Read/Write
Register Descriptions
PWM Control Registers 1 and 2 (PWCR1, PWCR2)
Description
Interrupt disabled
Interrupt enabled
Description
[Clearing conditions]
[Setting condition]
When PWCNT = PWCYR
—
—
7
1
When 0 is written to CMF after reading CMF = 1
When the DTC is activated by a compare match interrupt, and the DISEL bit in
the DTC’s MRB register is 0
—
—
6
1
R/W
IE
5
0
R/(W)*
CMF
4
0
CST
R/W
3
0
CKS2
R/W
2
0
CKS1
R/W
1
0
(Initial value)
(Initial value)
CKS0
R/W
0
0