HD6432646 Hitachi, HD6432646 Datasheet - Page 175

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HD6432646

Manufacturer Part Number
HD6432646
Description
(HD64F264x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet

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7.1
The H8S/2646 Series has a built-in bus controller (BSC) that manages the external address space
divided into eight areas. The bus specifications, such as bus width and number of access states,
can be set independently for each area, enabling multiple memories to be connected easily.
The bus controller also has a bus arbitration function, and controls the operation of the internal bus
masters: the CPU, and data transfer controller (DTC).
7.1.1
The features of the bus controller are listed below.
Manages external address space in area units
Basic bus interface
Burst ROM interface
Idle cycle insertion
Write buffer functions
Bus arbitration function
Other
Manages the external space as 8 areas of 2-Mbytes
Bus specifications can be set independently for each area
Burst ROM interface can be set
8-bit access or 16-bit access can be selected for each area
2-state access or 3-state access can be selected for each area
Program wait states can be inserted for each area
Burst ROM interface can be set for area 0
Choice of 1- or 2-state burst access
An idle cycle can be inserted in case of an external read cycle between different areas
An idle cycle can be inserted in case of an external write cycle immediately after an
External write cycle and internal access can be executed in parallel
Includes a bus arbiter that arbitrates bus mastership among the CPU and DTC
External bus release function
external read cycle
Overview
Features
Section 7 Bus Controller
141

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