HD6432646 Hitachi, HD6432646 Datasheet - Page 11

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HD6432646

Manufacturer Part Number
HD6432646
Description
(HD64F264x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet

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Section
15.3.2 Initialization
after Hardware
Reset
Bit Rate and Bit
Timing Settings
565 to
567
Page
Bit Rate and Bit Timing Settings: As bit rate settings, a baud rate setting and bit timing
setting must be made each time a CAN node begins communication. The baud rate and
bit timing settings are made in the bit configuration register (BCR).
Note:
Table 15-3 BCR Register Value Setting Ranges
Name
Time segment 1
Time segment 2
Baud rate prescaler
Sample point
Re-synchronization jump width
Value Setting Ranges
The following formula is used to calculate the baud rate.
Description
The value of SJW is stipulated in the CAN specifications.
The minimum value of TSEG1 is stipulated in the CAN specifications.
The minimum value of TSEG2 is stipulated in the CAN specifications.
BCR can be written to at all times, but should only be modified in configuration mode.
Settings should be made so that all CAN controllers connected to the CAN bus have the
same baud rate and bit width.
Refer to table 15.3 for the range of values that can be used as settings (TSEG1, TSEG2,
BRP, sample point, and SJW) for BCR.
3
TSEG1
TSEG2
Bit rate =
Note: f
SJW
The BCR value is used in the BRP, TSEG1, and TSEG2.
CLK
TSEG2
SJW
2
=
0
(BRP + 1)
(system clock)
Abbreviation
TSEG1
TSEG2
BRP
SAM
SJW
(3 + TSEG1 + TSEG2)
f
CLK
Min.
Value
B'0011
B'001
B'000000 B'111111
B'0
B'00
Max.
Value
B'1111
B'111
B'1
B'11

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