HD6432646 Hitachi, HD6432646 Datasheet - Page 368

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HD6432646

Manufacturer Part Number
HD6432646
Description
(HD64F264x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet

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10.2.9
TSYR is an 8-bit readable/writable register that selects independent operation or synchronous
operation for the channel 0 to 4 TCNT counters. A channel performs synchronous operation when
the corresponding bit in TSYR is set to 1.
TSYR is initialized to H'00 by a reset, and in hardware standby mode.
Bits 7 and 6—Reserved: Should always be written with 0.
Bits 5 to 0—Timer Synchro 5 to 0 (SYNC5 to SYNC0): These bits select whether operation is
independent of or synchronized with other channels.
When synchronous operation is selected, synchronous presetting of multiple channels
synchronous clearing through counter clearing on another channel
Bit n
SYNCn
0
1
Notes: *1 To set synchronous operation, the SYNC bits for at least two channels must be set to 1.
334
Bit
Initial value :
R/W
*2 To set synchronous clearing, in addition to the SYNC bit , the TCNT clearing source
Timer Synchro Register (TSYR)
must also be set by means of bits CCLR2 to CCLR0 in TCR.
Description
TCNTn operates independently (TCNT presetting/clearing is unrelated to
other channels)
TCNTn performs synchronous operation
TCNT synchronous presetting/synchronous clearing is possible
:
:
7
0
6
0
SYNC5
R/W
5
0
SYNC4
R/W
4
0
SYNC3
R/W
3
0
*2
are possible.
SYNC2
R/W
2
0
SYNC1
R/W
1
0
*1
(Initial value)
, and
n = 5 to 0
SYNC0
R/W
0
0

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