HD6432646 Hitachi, HD6432646 Datasheet - Page 241

• Manufacturer Part Number: HD6432646
• Description: (HD64F264x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

Table 8-9
Object to be Accessed
Bus width
Access states
Execution
status
The number of execution states is calculated from the formula below. Note that
of all transfers activated by one activation event (the number in which the CHNE bit is set to 1,
plus 1).
Number of execution states = I · (S
For example, when the DTC vector address table is located in on-chip ROM, normal mode is set,
and data is transferred from the on-chip ROM to an internal I/O register, the time required for the
DTC operation is 14 states. The time from activation to the end of the data write is 11 states.
Vector read
Register
information
read/write
Byte data read
Word data read
Byte data write
Word data write
Internal operation S
Number of States Required for Each Execution Status
S
S
S
S
S
S
I
J
K
K
L
L
M
I
+1) +
On-
Chip
RAM
32
1
—
1
1
1
1
1
1
(J · S
On-
Chip
ROM
16
1
1
—
1
1
1
1
1
J
+ K · S
On-Chip I/O
Registers
8
2
—
—
2
4
2
4
1
K
+ L · S
16
2
—
—
2
2
2
2
1
L
) + M · S
External Devices
8
2
4
—
2
4
2
4
1
8
3
6+2m 2
—
3+m
6+2m 2
3+m
6+2m 2
1
M
means the sum
16
2
—
2
2
1
16
3
3+m
—
3+m
3+m
3+m
3+m
1
207