LM3S101-CRN20-XNPP ETC1 [List of Unclassifed Manufacturers], LM3S101-CRN20-XNPP Datasheet - Page 244

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LM3S101-CRN20-XNPP

Manufacturer Part Number
LM3S101-CRN20-XNPP
Description
Microcontroller
Manufacturer
ETC1 [List of Unclassifed Manufacturers]
Datasheet
March 22, 2006
Reset
Reset
Type
Type
SSI Peripheral Identification 1 (SSIPeriphID1)
Offset 0xFE4
Bit/Field
RO
RO
31
15
0
0
31:8
7:0
Register 15: SSI Peripheral Identification 1 (SSIPeriphID1), offset 0xFE4
The SSIPeriphIDn registers are hard-coded and the fields within the register determine the reset
value.
RO
RO
30
14
0
0
reserved
Name
PID1
RO
RO
29
13
0
0
reserved
RO
RO
28
12
0
0
Type
RO
RO
27
11
0
0
RO
RO
RO
RO
26
10
0
0
Reset
0x0
RO
RO
25
0
0
9
0
Preliminary
RO
RO
24
0
8
0
Description
Reserved bits return an indeterminate value, and should
never be changed.
SSI Peripheral ID Register [15:8]
Can be used by software to identify the presence of this
peripheral.
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
PID1
RO
RO
19
0
3
0
LM3S101 Data Sheet
RO
RO
18
0
2
0
RO
RO
17
0
1
0
RO
RO
16
0
0
0
244

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