PEF2256 INFINEON [Infineon Technologies AG], PEF2256 Datasheet - Page 28

• Manufacturer Part Number: PEF2256
• Description: E1/T1/J1 Framer and Line Interface Component for Long- and Short-Haul Applications
• Manufacturer: INFINEON [Infineon Technologies AG]

Table 1
Pin or
Ball No.
12 (E3)
11 (E1)
54 (D9)
User’s Manual
Hardware Description
Name
IM
DBW
CS
Pin Definitions - Microprocessor Interface (cont’d)
Pin
Type
I
I
I
Buffer
Type
PU
PU
PU
Function
Data Bus Width
This input signal selects the bus interface
mode.
0
1
Interface Mode
The level on this pin defines the bus interface
mode.
0
1
Chip Select
A low signal selects the FALC
and write operations. This allows to connect
multiple devices to a single data/address bus.
0
1
28
B
B
B
B
B
B
DBW_0, 8-bit mode, D(7:0) are active.
D(15:8) are internally pulled high and
can be left open.
DBW_1, 16-bit mode, D(15:0) are
active. Word transfer to/from the
internal registers is enabled. In case of
byte transfers, the active half of the bus
is determined by A0 and BHE/BLE and
the selected bus interface mode (via
pin IM). The unused half is internally
pulled high.
IM_0, Intel bus interface mode.
IM_1, Motorola bus interface mode.
CS_0, device is selected for access.
CS_1, device is de-selected.
External Signals
DS1.1, 2003-10-23
PEF 2256 H/E
®
56 for read
FALC
®
56