PEF2256 INFINEON [Infineon Technologies AG], PEF2256 Datasheet - Page 150

• Manufacturer Part Number: PEF2256
• Description: E1/T1/J1 Framer and Line Interface Component for Long- and Short-Haul Applications
• Manufacturer: INFINEON [Infineon Technologies AG]

•
•
5.2.6.2
Remote alarm (yellow alarm) is indicated by the periodical pattern "1111 1111 0000 0000
…" in the DL-bits (T1 mode, RC0.SJR = 0). Remote alarm is declared even in the
presence of a bit error rate of up to 10
no longer is detected.
Depending on bit RC0.SJR = 1 the FALC
according to JT G. 704. In the DL-bit position 16 continuous "1" are transmitted if
FMR0.SRAF = 0 and FMR4.XRA = 1.
5.2.6.3
Generation and checking of CRC6 bits transmitted/received in the E(6:1) bit positions is
done according to ITU-T G.706. The CRC6 checking algorithm is enabled by bit
FMR1.CRC. If not enabled, all check bits in the transmit direction are set. In the
synchronous state received CRC6 errors are accumulated in a 16 bit error counter and
are additionally indicated by an interrupt status.
•
If enabled by bit RC0.CRCI, all CRC bits of one outgoing extended multiframe are
automatically inverted in case a CRC error is flagged for the previous received
multiframe. Setting the bit RC0.XCRCI inverts the CRC bits before transmitted to the
distant end. This function is logically ored with RC0.CRCI.
User’s Manual
Hardware Description
or two consecutive multiframe pattern were detected the FALC
asynchronous state, searching for a possible additionally available framing pattern.
This procedure is repeated until the framer has found three consecutive multiframe
pattern in a row.
FMR2.MCSP/SSP = 10: This mode has been added in order to be able to choose
multiple framing pattern candidates step by step. I.e. if in synchronous state the CRC
error counter indicates that the synchronization might have been based on an alias
framing pattern, setting of FMR0.FRS leads to synchronization on the next candidate
available. However, only the previously assumed candidate is discarded in the
internal framing pattern memory. The latter procedure can be repeated until the
framer has locked on the right pattern (no extensive CRC errors).
The synchronizer is reset completely and initiates a new frame search, if there is no
multiframing found. In this case bit FRS0.FSRF toggles.
FMR2.MCSP/SSP = 11: Synchronization including automatic CRC6 checking
Synchronization is achieved when framing pattern are correctly found and the CRC6
checksum is received without an error. If the CRC6 check failed on the assumed
framing pattern the FALC
possible available framing pattern. This procedure is repeated until the framer has
locked on the right pattern. This automatic synchronization mode has been added in
order to reduce the microprocessor load.
CRC6 inversion
Remote Alarm (yellow alarm) Generation/Detection
CRC6 Generation and Checking (T1/J1)
®
56 stays in the asynchronous state, searching for a
-3
. The alarm is reset when the yellow alarm pattern
®
150
56 generates and detects the remote alarm
Functional Description T1/J1
®
DS1.1, 2003-10-23
PEF 2256 H/E
56 stays in the
FALC
®
56