PEF2256 INFINEON [Infineon Technologies AG], PEF2256 Datasheet - Page 257

• Manufacturer Part Number: PEF2256
• Description: E1/T1/J1 Framer and Line Interface Component for Long- and Short-Haul Applications
• Manufacturer: INFINEON [Infineon Technologies AG]

Line Interface Mode 0 (Read/Write)
Value after reset: 00
LIM0
XFB
XDOS
RTRS
DCIM
User’s Manual
Hardware Description
XFB
7
Transmit Full Bauded Mode
Only applicable for dual-rail mode (bit LIM1.DRS = 1).
0 =
1 =
Note: If CMI coding is selected (FMR0.XC(1:0) = 01) this bit has to
Transmit Data Out Sense
0 =
1 =
Note: If CMI coding is selected (FMR0.XC(1:0) = 01) this bit has to
Receive Termination Resistor Switch
0 =
1 =
Digital Clocking Interface Mode
0 =
1 =
XDOS
H
Output signals XDOP/XDON are half bauded.
Output signals XDOP/XDON are full bauded.
Output signals XDOP/XDON are active low. Output XOID is
active high (normal operation).
Output signals XDOP/XDON are active high. Output XOID is
active low.
Default operation, switch is open.
An integrated internal resistor between RL1 and RL2 is
switched in addition to the external line termination resistor to
achieve 75
regarding resistance values see
Default E1 data operation.
Selects Synchronization interface mode according to ITU-T
G.703, Section 13. A 2.048-MHz receive clock signal must be
applied on RL1/RL2. The transmit clock signal must be derived
from the clock connected to SCLKX (CMR1.DXSS = 1). The
recommended XPM programming values are:
XPM0 = EF
be cleared.
be cleared.
The transmit frame marker XFM is independent of this bit.
RTRS
H
DCIM
, XPM1 = BD
line impedance matching. For further details
257
1
H
, XPM2 = 07
RLM
Chapter 4.1.7
H
LL
DS1.1, 2003-10-23
PEF 2256 H/E
MAS
on page 66.
E1 Registers
0
FALC
(36)
®
56