PEF2256 INFINEON [Infineon Technologies AG], PEF2256 Datasheet - Page 256

• Manufacturer Part Number: PEF2256
• Description: E1/T1/J1 Framer and Line Interface Component for Long- and Short-Haul Applications
• Manufacturer: INFINEON [Infineon Technologies AG]

EXTIW
Idle Channel Register (Read/Write)
Value after reset: 00
ICB1
ICB2
ICB3
ICB4
IC(31:0)
User’s Manual
Hardware Description
IC16
IC24
IC0
IC8
7
Extended CRC4 to Non-CRC4 Interworking
Only valid in multiframe format. This bit selects the reaction of the
synchronizer after the 400-ms time-out has been elapsed and starts
transmitting a remote alarm if FMR2.AXRA is set.
0 =
1 =
Idle Channel Selection Bits
These bits define the channels (time slots) of the outgoing PCM frame
to be altered.
Assignments:
IC0
IC1
...
IC31
0 =
1 =
Note: Although time slot 0 can be selected by bit IC0, its contents is
IC17
IC25
IC1
IC9
H
, 00
The CRC4 to Non CRC4 interworking is done as described in
ITU-T G. 706 Annex B.
The interworking is done according to ITU-T G. 706 with the
exception that the synchronizer still searches the multiframing
even if the 400-ms timer is expired. Switching into doubleframe
format is disabled. If FMR2.AXRA is set the remote alarm bit is
active in the outgoing data stream until the multiframe is found.
Normal operation.
Idle channel mode. The contents of the selected time slot is
overwritten by the idle channel code defined by register IDLE.
H
only altered if the transparent mode is selected (XSP.TT0).
Time slot 0
Time slot 1
Time slot 31
, 00
IC10
IC18
IC26
IC2
H
, 00
H
IC11
IC19
IC27
IC3
256
IC12
IC20
IC28
IC4
IC13
IC21
IC29
IC5
IC14
IC22
IC30
IC6
DS1.1, 2003-10-23
PEF 2256 H/E
IC15
IC23
IC31
IC7
E1 Registers
0
FALC
(32)
(33)
(34)
(35)
®
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