PEF2256 INFINEON [Infineon Technologies AG], PEF2256 Datasheet - Page 263
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PEF2256
Manufacturer Part Number
PEF2256
Description
E1/T1/J1 Framer and Line Interface Component for Long- and Short-Haul Applications
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet
1.PEF2256.pdf
(518 pages)
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LAC(1:0)
FLLB
LLBP
User’s Manual
Hardware Description
Length Activate (Up) Code
These bits defines the length of the LLB activate code which is
programmable in register LCR3.
00 = Length: 5 bit
01 = Length: 6 bit, 2 bit, 3 bit
10 = Length: 7 bit
11 = Length: 8 bit, 2 bit, 4 bit
Framed Line Loop-Back/Invert PRBS
Depending on bit LCR1.XPRBS this bit enables different functions:
LCR1.XPRBS = 0:
0 =
1 =
Invert PRBS
LCR1.XPRBS = 1:
0 =
1 =
Line Loop-Back Pattern
LCR1.XPRBS = 0
0 =
1 =
LCR1.XPRBS = 1 or LCR1.EPRM = 1
0 =
1 =
The line loop-back code is transmitted including framing bits.
LLB code overwrites the framing bits.
The line loop-back code is transmitted in framed mode. LLB
code does not overwrite the framing bits.
The generated PRBS is transmitted not inverted.
The PRBS is transmitted inverted.
Fixed line loop-back code according to ANSI T1. 403.
Enable user-programmable line loop-back code by register
LCR2/3.
2
2
15
20
-1
-1
263
DS1.1, 2003-10-23
PEF 2256 H/E
E1 Registers
FALC
®
56
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