PIC18C242 MICROCHIP [Microchip Technology], PIC18C242 Datasheet - Page 80

• Manufacturer Part Number: PIC18C242
• Description: High-Performance Microcontrollers with 10-Bit A/D
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18CXX2
8.2
PORTB is an 8-bit wide bi-directional port. The corre-
sponding data direction register is TRISB. Setting a
TRISB bit (=1) will make the corresponding PORTB pin
an input, (i.e., put the corresponding output driver in a
hi-impedance mode). Clearing a TRISB bit (=0) will
make the corresponding PORTB pin an output, ( i.e. put
the contents of the output latch on the selected pin).
The Data Latch register (LATB) is also memory
mapped. Read-modify-write operations on the LATB
register reads and writes the latched output value for
PORTB.
EXAMPLE 8-2:
Each of the PORTB pins has a weak internal pull-up. A
single control bit can turn on all the pull-ups. This is per-
formed by clearing bit RBPU (INTCON2<7>). The
weak pull-up is automatically turned off when the port
pin is configured as an output. The pull-ups are dis-
abled on a Power-on Reset.
Four of PORTB’s pins, RB7:RB4, have an interrupt on
change feature. Only pins configured as inputs can
cause this interrupt to occur (i.e. any RB7:RB4 pin con-
figured as an output is excluded from the interrupt on
change comparison). The input pins (of RB7:RB4) are
compared with the old value latched on the last read of
PORTB. The “mismatch” outputs of RB7:RB4 are
OR’ed together to generate the RB Port Change Inter-
rupt with flag bit RBIF (INTCON<0>).
This interrupt can wake the device from SLEEP. The
user, in the interrupt service routine, can clear the inter-
rupt in the following manner:
a)
b)
A mismatch condition will continue to set flag bit RBIF.
Reading PORTB will end the mismatch condition and
allow flag bit RBIF to be cleared.
The interrupt on change feature is recommended for
wake-up on key depression operation and operations
where PORTB is only used for the interrupt on change
feature. Polling of PORTB is not recommended while
using the interrupt on change feature.
DS39026B-page 80
CLRF
CLRF
MOVLW 0xCF
MOVWF TRISB
Any read or write of PORTB (except with the
MOVFF instruction). This will end the mismatch
condition.
Clear flag bit RBIF.
PORTB, TRISB and LATB Registers
PORTB
LATB
; Initialize PORTB by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RB<3:0> as inputs
; RB<5:4> as outputs
; RB<7:6> as inputs
INITIALIZING PORTB
Preliminary
FIGURE 8-4:
FIGURE 8-5:
Data Bus
WR TRIS
Data Bus
WR Port
WR TRISB
RB0/INT
WR LATB
or
PORTB
RBPU
RBPU
Note 1:
RBx/INTx
Note 1:
Set RBIF
From other
RB7:RB4 pins
(2)
(2)
2:
2:
I/O pins have diode protection to V
To enable weak pull-ups, set the appropriate TRIS
bit(s) and clear the RBPU bit (OPTION_REG<7>).
I/O pins have diode protection to V
To enable weak pull-ups, set the appropriate TRIS
bit(s) and clear the RBPU bit (INTCON2<7>).
RD TRISB
RD LATB
RD PORTB
Data Latch
TRIS Latch
BLOCK DIAGRAM OF
RB7:RB4 PINS
D
D
BLOCK DIAGRAM OF
RB2:RB0 PINS
CK
CK
RD TRIS
RD Port
Data Latch
TRIS Latch
D
D
CK
CK
Q
Q
Schmitt Trigger
Buffer
Q
Q
7/99 Microchip Technology Inc.
Q
Q
Latch
Q
EN
EN
D
D
DD
TTL
Input
Buffer
DD
EN
TTL
Input
Buffer
D
and V
and V
RD PORTB
V
P
DD
SS
weak
pull-up
V
SS
P
RD Port
DD
Buffer
I/O
pin
.
.
weak
pull-up
Q1
Q3
(1)
ST
I/O
pin
(1)