PIC18C242 MICROCHIP [Microchip Technology], PIC18C242 Datasheet - Page 197

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PIC18C242

Manufacturer Part Number
PIC18C242
Description
High-Performance Microcontrollers with 10-Bit A/D
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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19.1
ADDLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
7/99 Microchip Technology Inc.
Before Instruction
After Instruction
Decode
Instruction Set
WREG = 0x10
WREG = 0x25
Q1
ADD literal to WREG
[ label ] ADDLW
0
(WREG) + k
N,OV, C, DC, Z
The contents of WREG are added
to the 8-bit literal ’k’ and the result is
placed in WREG.
1
1
ADDLW
literal ’k’
Read
0000
Q2
k
255
0x15
1111
Process
Data
Q3
WREG
k
kkkk
Write to
WREG
Q4
kkkk
Preliminary
ADDWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
Before Instruction
After Instruction
Decode
WREG
REG
WREG
REG
Q1
=
=
=
=
register ’f’
ADD WREG to f
[ label ] ADDWF
0
d
a
(WREG) + (f)
N,OV, C, DC, Z
Add WREG to register ’f’. If ’d’ is 0,
the result is stored in WREG. If ’d’
is 1, the result is stored back in reg-
ister 'f' (default). If ’a’ is 0, the
Access Bank will be selected. If ’a’
is 1, the BSR will not be overridden
(default).
1
1
ADDWF
Read
0010
Q2
0x17
0xC2
0xD9
0xC2
f
[0,1]
[0,1]
PIC18CXX2
255
01da
REG, 0, 0
Process
Data
Q3
DS39026B-page 197
dest
f,d,a
ffff
destination
Write to
Q4
ffff

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