PIC18C242 MICROCHIP [Microchip Technology], PIC18C242 Datasheet - Page 142

• Manufacturer Part Number: PIC18C242
• Description: High-Performance Microcontrollers with 10-Bit A/D
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18CXX2
14.3.10 ACKNOWLEDGE SEQUENCE TIMING
An acknowledge sequence is enabled by setting the
acknowledge
(SSPCON2<4>). When this bit is set, the SCL pin is
pulled low and the contents of the acknowledge data bit
is presented on the SDA pin. If the user wishes to gen-
erate an acknowledge, then the ACKDT bit should be
cleared. If not, the user should set the ACKDT bit
before starting an acknowledge sequence. The baud
rate generator then counts for one rollover period
(T
When the SCL pin is sampled high (clock arbitration),
the baud rate generator counts for T
is then pulled low. Following this, the ACKEN bit is auto-
matically cleared, the baud rate generator is turned off
and the MSSP module then goes into IDLE mode
(Figure 14-20).
14.3.10.1 WCOL STATUS FLAG
If the user writes the SSPBUF when an acknowledge
sequence is in progress, then WCOL is set and the
contents of the buffer are unchanged (the write doesn’t
occur).
FIGURE 14-20: ACKNOWLEDGE SEQUENCE WAVEFORM
DS39026B-page 142
BRG
) and the SCL pin is de-asserted (pulled high).
Note: T
sequence
SSPIF
Acknowledge sequence starts here,
SDA
SCL
BRG
= one baud rate generator period.
Set SSPIF at the end
of receive
ACKEN = 1, ACKDT = 0
enable
Write to SSPCON2
BRG
. The SCL pin
bit
8
D0
ACKEN
Preliminary
Cleared in
software
T
BRG
ACK
14.3.11 STOP CONDITION TIMING
A stop bit is asserted on the SDA pin at the end of a
receive/transmit by setting the Stop sequence enable
bit, PEN (SSPCON2<2>). At the end of a receive/trans-
mit the SCL line is held low after the falling edge of the
ninth clock. When the PEN bit is set, the master will
assert the SDA line low. When the SDA line is sampled
low, the baud rate generator is reloaded and counts
down to 0. When the baud rate generator times out, the
SCL pin will be brought high, and one T
generator rollover count) later, the SDA pin will be de-
asserted. When the SDA pin is sampled high while SCL
is high, the P bit (SSPSTAT<4>) is set. A T
PEN bit is cleared and the SSPIF bit is set (Figure 14-
21).
14.3.11.1 WCOL STATUS FLAG
If the user writes the SSPBUF when a STOP sequence
is in progress, then the WCOL bit is set and the con-
tents of the buffer are unchanged (the write doesn’t
occur).
T
BRG
9
Set SSPIF at the end
of acknowledge sequence
ACKEN automatically cleared
Cleared in
software
7/99 Microchip Technology Inc.
BRG
BRG
(baud rate
later, the