PIC18C242 MICROCHIP [Microchip Technology], PIC18C242 Datasheet - Page 18

• Manufacturer Part Number: PIC18C242
• Description: High-Performance Microcontrollers with 10-Bit A/D
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18CXX2
2.6
The PIC18CXX2 devices include a feature that allows
the system clock source to be switched from the main
oscillator to an alternate low frequency clock source.
For the PIC18CXX2 devices, this alternate clock
source is the Timer1 oscillator. If a low-frequency crys-
tal (32 KHz, for example) has been attached to the
Timer1 oscillator pins and the Timer1 oscillator has
FIGURE 2-7:
2.6.1
The system clock source switching is performed under
software control. The system clock switch bit, SCS
(OSCCON<0>) controls the clock switching. When the
SCS bit is ’0’, the system clock source comes from the
main oscillator that is selected by the FOSC configura-
tion bits in Configuration Register1H. When the SCS
bit is set, the system clock source will come from the
Timer1 oscillator. The SCS bit is cleared on all forms
of reset.
Register 2-1:
bit 7-1
bit 0
DS39026B-page 18
Oscillator Switching Feature
SYSTEM CLOCK SWITCH BIT
bit 7
Unimplemented: Read as '0'
SCS: System Clock Switch bit
when OSCSEN configuration bit = ’0’ and T1OSCEN bit is set:
1 = Switch to Timer1 Oscillator/Clock pin
0 = Use primary Oscillator/Clock input pin
when OSCSEN and T1OSCEN are in other states:
bit is forced clear
Legend
R = Readable bit
- n = Value at POR reset
U-0
—
DEVICE CLOCK SOURCES
OSCCON Register
OSC2
OSC1
T1OSO
T1OSI
U-0
—
Timer1 Oscillator
Main Oscillator
PIC18CXXX
W = Writable bit
’1’ = Bit is set
U-0
—
Sleep
T1OSCEN
Enable
Oscillator
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
Clock Source option
for other modules
4 x PLL
U-0
been enabled, the device can switch to a low power
execution mode. Figure 2-7 shows a block diagram of
the system clock sources. The clock switching feature
is enabled by programming the Oscillator Switching
Enable (OSCSEN) bit in Configuration Register1H to a
’0’. Clock switching is disabled in an erased device.
See Section 9 for further details of the Timer1 oscillator.
See Section 18.0 for Configuration Register details.
—
T
T
Note:
T
OSC
1
P
Tosc/4
U-0
The Timer1 oscillator must be enabled to
switch the system clock source.
Timer1 oscillator is enabled by setting the
T1OSCEN bit in the Timer1 control register
(T1CON). If the Timer1 oscillator is not
enabled, then any write to the SCS bit will
be ignored (SCS bit forced cleared) and
the main oscillator will continue to be the
system clock source.
—
x = Bit is unknown
Source
U-0
Clock
—
7/99 Microchip Technology Inc.
bit 0
R/W-1
SCS
T
SCLK
The