PIC18C242 MICROCHIP [Microchip Technology], PIC18C242 Datasheet - Page 265

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PIC18C242

Manufacturer Part Number
PIC18C242
Description
High-Performance Microcontrollers with 10-Bit A/D
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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FIGURE 21-17: I
TABLE 21-16: I
100
101
102
103
90
91
106
107
92
109
110
D102
Note 1: As a transmitter, the device must provide this internal minimum delay time to bridge the undefined region (min. 300 ns) of
Param.
7/99 Microchip Technology Inc.
No.
2: A fast-mode I
T
T
T
T
T
T
T
T
T
T
T
Cb
the falling edge of SCL to avoid unintended generation of START or STOP conditions.
then be met. This will automatically be the case if the device does not stretch the LOW period of the SCL signal. If such a
device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line.
T
released.
SDA
Out
SDA
In
R
AA
R
SCL
HIGH
LOW
F
SU
HD
HD
SU
SU
BUF
Symbol
max. + tsu;DAT = 1000 + 250 = 1250 ns (according to the standard-mode I
:
:
:
:
:
STA
DAT
STO
STA
DAT
Note: Refer to Figure 21-4 for load conditions.
2
2
C BUS DATA TIMING
C BUS DATA REQUIREMENTS (SLAVE MODE)
Clock high time
Clock low time
SDA and SCL rise
time
SDA and SCL fall
time
START condition
setup time
START condition hold
time
Data input hold time
Data input setup time 100 kHz mode
STOP condition
setup time
Output valid from
clock
Bus free time
Bus capacitive loading
2
C bus device can be used in a standard-mode I
90
103
91
Characteristic
109
100 kHz mode
400 kHz mode
SSP Module
100 kHz mode
400 kHz mode
SSP Module
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100
Preliminary
106
101
109
20 + 0.1Cb
20 + 0.1Cb
1.5T
1.5T
107
Min
250
100
2
4.0
0.6
4.7
1.3
4.7
0.6
4.0
0.6
4.7
0.6
4.7
1.3
0
0
C bus system, but the requirement tsu;DAT
CY
CY
1000
3500
Max
300
300
300
0.9
400
2
C bus specification) before the SCL line is
Units
pF
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
s
s
s
s
s
s
s
s
s
s
s
s
PIC18CXX2
Cb is specified to be from
Cb is specified to be from
PIC18CXXX must operate at a
minimum of 1.5 MHz
PIC18CXXX must operate at a
minimum of 10 MHz
PIC18CXXX must operate at a
minimum of 1.5 MHz
PIC18CXXX must operate at a
minimum of 10 MHz
10 to 400 pF
10 to 400 pF
Only relevant for repeated
START condition
After this period the first clock
pulse is generated
Note 2
Note 1
Time the bus must be free
before a new transmission can
start
92
102
110
Conditions
DS39026B-page 265
250 ns must

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