PIC18C242 MICROCHIP [Microchip Technology], PIC18C242 Datasheet - Page 44

• Manufacturer Part Number: PIC18C242
• Description: High-Performance Microcontrollers with 10-Bit A/D
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18CXX2
TABLE 4-2:
DS39026B-page 44
Filename
TOSU
TOSH
TOSL
STKPTR
PCLATU
PCLATH
PCL
TBLPTRU
TBLPTRH
TBLPTRL
TABLAT
PRODH
PRODL
INTCON
INTCON2
INTCON3
INDF0
POSTINC0
POSTDEC0
PREINC0
PLUSW0
FSR0H
FSR0L
WREG
INDF1
POSTINC1
POSTDEC1
PREINC1
PLUSW1
FSR1H
FSR1L
BSR
INDF2
POSTINC2
POSTDEC2
PREINC2
PLUSW2
FSR2H
FSR2L
STATUS
TMR0H
TMR0L
T0CON
Legend: x = unknown, u = unchanged, - = unimplemented, q = value depends on condition
Note 1: RA6 and associated bits are configured as port pins in RCIO and ECIO oscillator mode only and read ’0’ in all
2: Bit 21 of the TBLPTRU allows access to the device configuration bits.
3: Other (non-power-up) resets include external reset through MCLR and Watchdog Timer Reset.
other oscillator modes.
Bit 7
Top-of-Stack High Byte (TOS<15:8>)
Top-of-Stack Low Byte (TOS<7:0>)
Holding Register for PC<15:8>
PC Low Byte (PC<7:0>)
Program Memory Table Pointer High Byte (TBLPTR<15:8>)
Program Memory Table Pointer Low Byte (TBLPTR<7:0>)
Program Memory Table Latch
Product Register High Byte
Product Register Low Byte
GIE/GIEH
RBPU
INT2IP
Uses contents of FSR0 to address data memory - value of FSR0 not changed (not a physical register)
Uses contents of FSR0 to address data memory - value of FSR0 post-incremented (not a physical register)
Uses contents of FSR0 to address data memory - value of FSR0 post-decremented (not a physical register)
Uses contents of FSR0 to address data memory - value of FSR0 pre-incremented (not a physical register)
Uses contents of FSR0 to address data memory - value of FSR0 pre-incremented (not a physical register) -
value of FSR0 offset by value in WREG
Indirect Data Memory Address Pointer 0 Low Byte
Working Register
Uses contents of FSR1 to address data memory - value of FSR1 not changed (not a physical register)
Uses contents of FSR1 to address data memory - value of FSR1 post-incremented (not a physical register)
Uses contents of FSR1 to address data memory - value of FSR1 post-decremented (not a physical register)
Uses contents of FSR1 to address data memory - value of FSR1 pre-incremented (not a physical register)
Uses contents of FSR1 to address data memory - value of FSR1 pre-incremented (not a physical register) -
value of FSR1 offset by value in WREG
Indirect Data Memory Address Pointer 1 Low Byte
Uses contents of FSR2 to address data memory - value of FSR2 not changed (not a physical register)
Uses contents of FSR2 to address data memory - value of FSR2 post-incremented (not a physical register)
Uses contents of FSR2 to address data memory - value of FSR2 post-decremented (not a physical register)
Uses contents of FSR2 to address data memory - value of FSR2 pre-incremented (not a physical register)
Uses contents of FSR2 to address data memory - value of FSR2 pre-incremented (not a physical register) -
value of FSR2 offset by value in WREG
Indirect Data Memory Address Pointer 2 Low Byte
Timer0 register high byte
Timer0 register low byte
TMR0ON
STKFUL
—
—
—
—
—
—
—
—
REGISTER FILE SUMMARY
Bit 6
PEIE/GIEL
INTEDG0
INT1IP
T08BIT
STKUNF
—
—
—
—
—
—
—
—
Bit 5
bit21
TMR0IE
INTEDG1
T0CS
—
—
—
—
—
—
—
—
—
(2)
Bit 4
Top-of-Stack upper Byte (TOS<20:16>)
Return Stack Pointer
Holding Register for PC<20:16>
Program Memory Table Pointer Upper Byte (TBLPTR<20:16>)
INT0IE
INTEDG2
INT2IE
N
T0SE
—
—
—
—
Preliminary
Bit 3
RBIE
INT1IE
Indirect Data Memory Address Pointer 0 High Byte
Indirect Data Memory Address Pointer 1 High Byte
Bank Select Register
Indirect Data Memory Address Pointer 2 High Byte
OV
PSA
—
Bit 2
TMR0IF
TMR0IP
Z
T0PS2
—
Bit 1
INT0IF
INT2IF
DC
T0PS1
—
Bit 0
RBIF
RBIP
INT1IF
C
T0PS0
7/99 Microchip Technology Inc.
Value on
POR,
BOR
---0 0000
0000 0000
0000 0000
00-0 0000
---0 0000
0000 0000
0000 0000
---0 0000
0000 0000
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
0000 000x
1111 -1-1
11-0 0-00
n/a
n/a
n/a
n/a
n/a
---- 0000
xxxx xxxx
xxxx xxxx
n/a
n/a
n/a
n/a
n/a
---- 0000
xxxx xxxx
---- 0000
n/a
n/a
n/a
n/a
n/a
---- 0000
xxxx xxxx
---x xxxx
0000 0000
xxxx xxxx
1111 1111
Value on
all other
resets
(note 3)
---0 0000
0000 0000
0000 0000
00-0 0000
---0 0000
0000 0000
0000 0000
---0 0000
0000 0000
0000 0000
0000 0000
uuuu uuuu
uuuu uuuu
0000 000u
1111 -1-1
11-0 0-00
n/a
n/a
n/a
n/a
n/a
---- 0000
uuuu uuuu
uuuu uuuu
n/a
n/a
n/a
n/a
n/a
---- 0000
uuuu uuuu
---- 0000
n/a
n/a
n/a
n/a
n/a
---- 0000
uuuu uuuu
---u uuuu
0000 0000
uuuu uuuu
1111 1111