PIC18C242 MICROCHIP [Microchip Technology], PIC18C242 Datasheet - Page 226
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PIC18C242
Manufacturer Part Number
PIC18C242
Description
High-Performance Microcontrollers with 10-Bit A/D
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18C242.pdf
(296 pages)
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PIC18CXX2
SLEEP
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
† If WDT causes wake-up, this bit is cleared
DS39026B-page 226
Before Instruction
After Instruction
Decode
TO
PD
TO
PD
Q1
=
=
=
=
?
?
1 †
0
operation
Enter SLEEP mode
[ label ] SLEEP
None
00h
0
1
0
The power-down status bit (PD) is
cleared. The time-out status bit
(TO) is set. Watchdog Timer and
its postscaler are cleared.
The processor is put into SLEEP
mode with the oscillator stopped.
1
1
SLEEP
TO, PD
No
Q2
0000
WDT postscaler,
TO,
PD
WDT,
0000
Process
Data
Q3
0000
Go to
sleep
Q4
0011
Preliminary
SUBFWB
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Decode
Q1
register ’f’
Subtract f from WREG with
borrow
[ label ] SUBFWB f,d,a
0
d
a
(WREG) – (f) – (C)
N,OV, C, DC, Z
Subtract register 'f' and carry flag
(borrow) from WREG (2’s comple-
ment method). If 'd' is 0, the result
is stored in WREG. If 'd' is 1, the
result is stored in register 'f'
(default) . If ’a’ is 0, the Access
Bank will be selected, overriding
the BSR value. If ’a’ is 1, then the
bank will be selected as per the
BSR value (default).
1
1
Read
Q2
0101
f
[0,1]
[0,1]
7/99 Microchip Technology Inc.
255
01da
Process
Data
Q3
ffff
dest
destination
Write to
Q4
ffff
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