PIC18C242 MICROCHIP [Microchip Technology], PIC18C242 Datasheet - Page 208

• Manufacturer Part Number: PIC18C242
• Description: High-Performance Microcontrollers with 10-Bit A/D
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18CXX2
COMF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
DS39026B-page 208
Before Instruction
After Instruction
Decode
REG
REG
WREG
Q1
=
=
=
register ’f’
Complement f
[ label ] COMF
0
d
a
N,Z
The contents of register ’f’ are com-
plemented. If ’d’ is 0 the result is
stored in WREG. If ’d’ is 1 the result
is stored back in register ’f’
(default). If ’a’ is 0, the Access
Bank will be selected, overriding
the BSR value. If ’a’ = 1, then the
bank will be selected as per the
BSR value (default).
1
1
COMF
( f )
Read
0001
Q2
0x13
0x13
0xEC
f
[0,1]
[0,1]
255
dest
11da
REG, 0, 0
Process
Data
Q3
f,d,a
ffff
destination
Write to
Q4
ffff
Preliminary
CPFSEQ
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
If skip:
If skip and followed by 2-word instruction:
Example:
Before Instruction
After Instruction
operation
operation
operation
Decode
PC Address =
WREG
REG
If REG
If REG
No
No
No
Q1
Q1
Q1
PC
PC
register ’f’
operation
operation
operation
Compare f with WREG, skip if f =
WREG
[ label ] CPFSEQ
0
a
(f) – (WREG),
skip if (f) = (WREG)
(unsigned comparison)
None
Compares the contents of data
memory location 'f' to the contents
of WREG by performing an
unsigned subtraction.
If 'f' = WREG
instruction is discarded and an NOP
is executed instead making this a
two-cycle instruction. If ’a’ is 0, the
Access Bank will be selected, over-
riding the BSR value. If ’a’ = 1,
then the bank will be selected as
per the BSR value (default).
1
1(2)
Note: 3 cycles if skip and followed
by a 2-word instruction
HERE
NEQUAL
EQUAL
Read
0110
No
No
No
Q2
Q2
Q2
=
=
=
=
=
f
[0,1]
255
7/99 Microchip Technology Inc.
HERE
?
?
WREG;
Address (EQUAL)
WREG;
Address (NEQUAL)
CPFSEQ REG, 0
:
:
001a
operation
operation
operation
Process
,
Data
then the fetched
No
No
No
Q3
Q3
Q3
ffff
f,a
operation
operation
operation
operation
No
Q4
No
No
No
Q4
Q4
ffff