PIC18C242 MICROCHIP [Microchip Technology], PIC18C242 Datasheet - Page 50

• Manufacturer Part Number: PIC18C242
• Description: High-Performance Microcontrollers with 10-Bit A/D
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18CXX2
4.13
The STATUS register, shown in Register 4-2, contains
the arithmetic status of the ALU. The STATUS register
can be the destination for any instruction, as with any
other register. If the STATUS register is the destination
for an instruction that affects the Z, DC, C, OV or N bits,
then the write to these five bits is disabled. These bits
are set or cleared according to the device logic. There-
fore, the result of an instruction with the STATUS regis-
ter as destination may be different than intended.
Register 4-2:
bit 7:5
bit 4
bit 3
bit2
bit 1
bit 0
DS39026B-page 50
STATUS Register
Unimplemented: Read as ’0’
N: Negative bit
This bit is used for signed arithmatic (2’s complement). It indicates whether the result was neg-
ative, (ALU MSB = 1)
1 = Result was negative
0 = Result was positive
OV: Overflow bit
This bit is used for signed arithmetic (2’s complement). It indicates an overflow of the 7-bit mag-
nitude, which causes the sign bit (bit7) to change state.
1 = Overflow occurred for signed arithmatic (in this arithmetic operation)
0 = No overflow occurred
Z: Zero bit
1 = The result of an arithmetic or logic operation is zero
0 = The result of an arithmetic or logic operation is not zero
DC: Digit carry/borrow bit
For ADDWF, ADDLW, SUBLW, and SUBWF instructions
1 = A carry-out from the 4th low order bit of the result occurred
0 = No carry-out from the 4th low order bit of the result
C: Carry/borrow bit
For ADDWF, ADDLW, SUBLW, and SUBWF instructions
1 = A carry-out from the most significant bit of the result occurred
0 = No carry-out from the most significant bit of the result occurred
Legend:
R = Readable bit
- n = Value at POR reset
bit 7
Note:
Note:
U-0
—
STATUS Register
For borrow, the polarity is reversed. A subtraction is executed by adding the two’s
complement of the second operand. For rotate (RRF, RLF) instructions, this bit is
loaded with either the bit 4 or bit 3 of the source register.
For borrow, the polarity is reversed. A subtraction is executed by adding the two’s
complement of the second operand. For rotate (RRF, RLF) instructions, this bit is
loaded with either the high or low order bit of the source register.
U-0
—
U-0
W = Writable bit
’1’ = Bit is set
—
R/W-x
Preliminary
N
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
R/W-x
For example, CLRF STATUS will clear the upper-three
bits and set the Z bit. This leaves the STATUS register
as 000u u1uu (where u = unchanged).
It is recommended, therefore, that only BCF, BSF,
SWAPF, MOVFF and MOVWF instructions are used to
alter the STATUS register, because these instruc-
tions do not affect the Z, C, DC, OV or N bits from
the STATUS register. For other instructions not
affecting any status bits, see Table 19-2.
OV
Note:
R/W-x
The C and DC bits operate as a borrow and
digit borrow bit respectively, in subtraction.
Z
x = Bit is unknown
R/W-x
DC
7/99 Microchip Technology Inc.
bit 0
R/W-x
C