PIC18C242 MICROCHIP [Microchip Technology], PIC18C242 Datasheet - Page 163

• Manufacturer Part Number: PIC18C242
• Description: High-Performance Microcontrollers with 10-Bit A/D
• Manufacturer: MICROCHIP [Microchip Technology]

15.3.2
Once synchronous mode is selected, reception is
enabled by setting either enable bit SREN (RCSTA<5>)
or enable bit CREN (RCSTA<4>). Data is sampled on
the RC7/RX/DT pin on the falling edge of the clock. If
enable bit SREN is set, only a single word is received.
If enable bit CREN is set, the reception is continuous
until CREN is cleared. If both bits are set, then CREN
takes precedence.
TABLE 15-9:
Name
INTCON
PIR1
PIE1
IPR1
RCSTA
RCREG
TXSTA
SPBRG
Legend: x = unknown, — = unimplemented read as '0'.
Note 1: The PSPIF, PSPIE and PSPIP bits are reserved on the PIC18C2X2 devices. Always maintain these bits clear.
7/99 Microchip Technology Inc.
USART SYNCHRONOUS MASTER
RECEPTION
Shaded cells are not used for Synchronous Master Reception.
USART Receive Register
Baud Rate Generator Register
PSPIF
PSPIE
PSPIP
SPEN
CSRC
GIEH
Bit 7
GIE/
REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER RECEPTION
(1)
(1)
(1)
PEIE/
ADIE
ADIP
GIEL
ADIF
Bit 6
RX9
TX9
TMR0IE INT0IE
SREN
TXEN
RCIF
RCIE
RCIP
Bit 5
CREN
SYNC
Bit 4
TXIF
TXIE
TXIP
SSPIF CCP1IF TMR2IF TMR1IF
SSPIE CCP1IE TMR2IE TMR1IE
SSPIP CCP1IP TMR2IP TMR1IP
Preliminary
RBIE
Bit 3
—
—
TMR0IF
BRGH
FERR
Bit 2
Steps to follow when setting up a Synchronous Master
Reception:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. If any error occurred, clear the error by clearing
Initialize the SPBRG register for the appropriate
baud rate. (Section 15.1)
Enable the synchronous master serial port by
setting bits SYNC, SPEN and CSRC.
Ensure bits CREN and SREN are clear.
If interrupts are desired, set enable bit RCIE.
If 9-bit reception is desired, set bit RX9.
If a single reception is required, set bit SREN.
For continuous reception, set bit CREN.
Interrupt flag bit RCIF will be set when reception
is complete and an interrupt will be generated if
the enable bit RCIE was set.
Read the RCSTA register to get the ninth bit (if
enabled) and determine if any error occurred
during reception.
Read the 8-bit received data by reading the
RCREG register.
bit CREN.
INT0IF
OERR
TRMT
Bit 1
RX9D
TX9D
RBIF
Bit 0
PIC18CXX2
0000 000x
0000 0000
0000 0000
0000 0000
0000 -00x
0000 0000
0000 -010
0000 0000
Value on
POR,
BOR
DS39026B-page 163
Value on all
0000 000u
0000 0000
0000 0000
0000 0000
0000 -00x
0000 0000
0000 -010
0000 0000
Resets
other