PIC18C242 MICROCHIP [Microchip Technology], PIC18C242 Datasheet - Page 39

• Manufacturer Part Number: PIC18C242
• Description: High-Performance Microcontrollers with 10-Bit A/D
• Manufacturer: MICROCHIP [Microchip Technology]

4.7.1
The PIC18CXX2 devices have 4 two-word instructions:
MOVFF, CALL, GOTO and LFSR. The second word of
these instructions has the 4 MSB’s set to 1’s and is a
special kind of NOP instruction. The lower 12 bits of the
second word contain data to be used by the instruction.
If the first word of the instruction is executed, the data
in the second word is accessed. If the second word of
EXAMPLE 4-3:
4.8
Look-up tables are implemented two ways. These are:
• Computed GOTO
• Table Reads
4.8.1
A computed GOTO is accomplished by adding an offset
to the program counter (ADDWF PCL).
A lookup table can be formed with an ADDWF PCL
instruction and a group of RETLW 0xnn instructions.
WREG is loaded with an offset into the table before
executing a call to that table. The first instruction of the
called routine is the ADDWF PCL instruction. The next
instruction executed will be one of the RETLW 0xnn
instructions that returns the value 0xnn to the calling
function.
The offset value (value in WREG) specifies the number
of bytes that the program counter should advance.
In this method, only one data byte may be stored in
each instruction location and room on the return
address stack is required.
CASE 1:
Object code
0110 0110 0000 0000
1100 0001 0010 0011
1111 0100 0101 0110
0010 0100 0000 0000
CASE 2:
Object code
0110 0110 0000 0000
1100 0001 0010 0011
1111 0100 0101 0110
0010 0100 0000 0000
7/99 Microchip Technology Inc.
TWO-WORD INSTRUCTIONS
Lookup Tables
COMPUTED GOTO
TWO-WORD INSTRUCTIONS
Source Code
TSTFSZ
MOVFF
ADDWF
Source Code
TSTFSZ
MOVFF
ADDWF
REG1
REG1, REG2 ; No, execute 2-word instruction
REG3
REG1
REG1, REG2 ; Yes
REG3
Preliminary
; is RAM location 0?
; 2nd operand holds address of REG2
; continue code
; is RAM location 0?
; 2nd operand becomes NOP
; continue code
the instruction is executed by itself (first word was
skipped), it will execute as a NOP. This action is neces-
sary when the two word instruction is preceded by a
conditional instruction that changes the PC. A program
example that demonstrates this concept is shown in
Example 4-3. Refer to Section 19.0 for further details of
the instruction set.
4.8.2
A better method of storing data in program memory
allows 2 bytes of data to be stored in each instruction
location.
Lookup table data may be stored 2 bytes per program
word by using table reads and writes. The table pointer
(TBLPTR) specifies the byte address and the table
latch (TABLAT) contains the data that is read from or
written to program memory. Data is transferred to/from
program memory one byte at a time.
A description of the Table Read/Table Write operation
is shown in Section 5.0.
TABLE READS/TABLE WRITES
PIC18CXX2
DS39026B-page 39