tc59ym916bkg24a ETC-unknow, tc59ym916bkg24a Datasheet - Page 73

• Manufacturer Part Number: tc59ym916bkg24a
• Description: The Second Generation 512-megabit Xdrtm Dram
• Manufacturer: ETC-unknow

Package Description
Package Parasitic Summary
memory component. Most of the parameters have maximum values only, however some have both maximum and
minimum values.
resistance values.
capacitance, and resistance values. There are also limits on the spread in inductance and capacitance values
allowed in any one memory component.
capacitance, and resistance values. There are also limits on the spread in inductance and capacitance values
allowed in any one memory component.
a.
b.
L
L
C
R
L
C
R
L
∆L
∆C
Z
C
∆C
R
L
C
Table 18 summarizes inductance, capacitance, and resistance values associated with each pin group for the
The first group of parameters are for the CFM/CFMN clock pair pins. They include inductance, capacitance, and
The second group of parameters are for the RQ request pins. They include inductance, mutual inductance,
The third group of parameters are specific to the DQ data pins and include inductance, mutual inductance,
The fourth group of parameters are for the serial interface pins. They include inductance and capacitance values.
VTERM
I, CFM
I, RQ
12, RQ
I, SI
PKG, DQ
I, CFM
I, CFM
I, RQ
I, RQ
I, DQ
I, RQ
I, SI
Symbol
I, RQ
I, RQ
I, DQ
This is the effective die input capacitance, and does not include package capacitance.
CFM/RQ/SI should include package capacitance / Inductance, only DQ does not include package Capacitance. This value is a
combination of the device IO circuitry and package capacitance and inductance.
V
CFM/CFMN pins – effective input inductance
CFM/CFMN pins – effective input capacitance
CFM/CFMN pins – effective input resistance
RSL RQ pins – effective input inductance
RSL RQ pins – effective input resistance
Mutual inductance between adjacent RSL RQ signals
Difference in L
Difference in C
DRSL DQ pins – package differential impedance
note – package trace length should be less than 10mm long
DRSL DQ pins – effective input capacitance
Difference in C
DRSL DQ pins – effective input resistance
Serial Interface effective input inductance
Serial Interface effective input capacitance
RSL RQ pins – effective input capacitance
TERM
pin – effective input inductance per for bits
I, RQ
I
I
between CFM/CFMN average and RSL RQ pins of single device
between DQi and DQNi of each DRSL pair
between any RSL RQ pins of a single device
Table 18. Package RSL Parasitic Summary
Parameter and Other Conditions
b
b
TC59YM916BKG24A,32A,32B,40B,32C,40C
b
b
a
b
b
a
(RST, SCK, CMD)
(SDI, SDO)
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
2400
3200
4000
2400
3200
4000
2400
3200
4000
2400
3200
4000
2400
3200
4000
2400
3200
4000
2400
3200
4000
2004-12-15 73/76
−0.06
TBD
TBD
TBD
TBD
Min
1.8
1.8
1.7
70
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
4
4
4
+0.06
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Max
0.06
Rev 0.1
130
1.2
4.0
2.4
4.0
2.4
0.6
1.8
2.0
8.0
3.0
7.0
15
15
25
Units
nH
nH
nH
nH
nH
nH
pF
pF
pF
pF
pF
pF
Ω
Ω
Ω
Ω