tc59ym916bkg24a ETC-unknow, tc59ym916bkg24a Datasheet - Page 39

• Manufacturer Part Number: tc59ym916bkg24a
• Description: The Second Generation 512-megabit Xdrtm Dram
• Manufacturer: ETC-unknow

Figure 31. Impedance Calibration 1 (ZC1) Register
Figure 32. Current Fuse Setting 0 (FZC0) Register
Figure 33. Current Fuse Setting 1 (FZC1) Register
Figure 34. Read Only Memory 0 (ROM0) Register
Figure 35. Read Only Memory 1 (ROM1) Register
7
7
7
7
7
BB [1:0]
VENDOR [3:0]
6
6
6
6
6
5
5
5
5
5
RB [2:0]
4
4
4
4
4
reserved
reserved
reserved
3
3
3
3
3
MASK [3:0]
2
2
2
2
2
CB [2:0]
1
1
1
1
1
TC59YM916BKG24A,32A,32B,40B,32C,40C
0
0
0
0
0
Impedance Calibration 1 Register
SADR [7:0]: 00010011
Current Fuse Setting Register
SADR [7:0]: 00010100
Current Fuse Setting Register
SADR [7:0]: 00010101
Read Only Memory 0 Register
SADR [7:0]: 00010110
MASK [3:0] – Version number of mask (0001
VENDOR [3:0] – Vendor number for component:
Read Only Memory 1 Register
SADR [7:0]: 00010111
CB [2:0] – Column address bits:
RB [2:0] – Row address bits:
BB [2:0] – Bank address bits:
address bits are present. An offset of {6,10,2} is added to the field
value to give the number of address bits.
There three fields indicate how many column, row, and bank
resereved.
reserved
reserved
0000 – Reserved
0001 – Toshiba
0010 – Elpida
0011 – SEC
2
2
2
2
2
ROM0 [7:0] resets to vvvvmmmm
0100 – 1111 – Reserved
#bits = 6 + CB [2:0]
#bits = 10 + RB [2:0]
#bits = 2 + BB [2:0]
ZC1 [7:0] resets to 00000000
FZC0 [7:0] resets to vvvvvvvv
FZC1 [7:0] resets to vvvvvvvv
ROM0 [7:0] resets to bbrrrccc
2004-12-15 39/76
(vendor-dependent reset value)
(vendor-dependent reset value)
2
is first version).
Read/write register
Read-only register
Read-only register
Read-only register
Read-only register
Rev 0.1
2