tc59ym916bkg24a ETC-unknow, tc59ym916bkg24a Datasheet - Page 12

• Manufacturer Part Number: tc59ym916bkg24a
• Description: The Second Generation 512-megabit Xdrtm Dram
• Manufacturer: ETC-unknow

Request Field Encoding
provides packet type and encoding summaries.
single command: ACT and WRM. The COL, COLX, and ROWP packets each use additional fields to specify
multiple commands: WRX, XOP, and POP/ROP, respectively. The COLM packet specifies the masked write
command WRM. This is like the WR unmasked write command, except that a mask field M7...M0 indicates
whether each byte of the write data packet is written or not written. The ROWA packet specifies the row activate
command ACT. The COL packet uses the WRX field to specify the column read and column write (unmasked)
commands
operation) command. The REFP command uses the RA field to select a bank to be precharged. The REFA and REFI
commands use the RA field and REFH/M/L registers to select a bank and row to be activated for refresh. The REFI
command also increments the REFH/M/L register. The REFP, REFA, and REFI commands may also be delayed by
up to 3*t
the RA [7:0] field.
ROP [2:0]
OP [3:0]
Operation-code fields
Table 3 shows the OP field encoding for the five packet types. The COLM and ROWA packets each specify a
Encoding of the ROP field in the ROWP packet is shown in Table 4. The first encoding specifies a NOPR (no
0000
0001
0010
0011
01xx
1xxx
000
001
010
011
100
101
110
111
CYCLE
Command
Packet
ROWP
ROWA
COLM
COLX
COL
NOPR
REFP
REFA
LRR0
LRR1
LRR2
REFI
⎯
⎯
using the RA [7:6] field. The LRR0, LRR1, and LRR2 commands load the REFH/M/L registers from
Command
No operation
Refresh precharge command. Bank RA2…RA0 is precharged.
This command is delayed by {0, 1, 2, 3}*t
Refresh activate command. Row R [11:0] (from REFH/M/L register) of bank RA2…RA0 is placed into sense
amp.
This command is delayed by {0, 1, 2, 3}*t
Refresh activate command. Row R [11:0] (from REFH/M/L register) of bank RA2…RA0 is placed into sense
amp.
This command is delayed by {0, 1, 2, 3}*t
R[11 : 0] field of REFH/M/L register is incremented after the activate command has completed.
Load Refresh Low Row register (REFL). RA [7:0] is stored in R [7:0] field.
Load Refresh Middle Row register (REFM). RA [3:0] is stored in R [11:8] field.
Load Refresh High Row register – not used with this device
Reserved
REFy,
PREx
WRM
CALy
LRRr
NOP
ACT
WR
RD
are encoded within different packet types to specify commands. Table 3 through Table 6
No operation
Column read (WRX = 0). Column C9…C4 of sense amp in bank BC2…BC0 is read to DQ bus after
DELC*t
Column write (WRX = 1). Write DQ bus to column C9…C4 of sense amp in bank BC2…BC0 after
DELC*t
XOP3…XOP0 specifies a calibrate or Power Down command – see Table 6 on page 13.
POP2…POP0 specifies a row precharge command – see Table 5 on page 13.
ROP2…ROP0 specifies a row refresh command or load REFr register command – see Table 4 on
page 12.
Row activate command. Row R11…R0 of bank BA2…BA0 is placed into the sense amp of the
bank after DELA*t
Column write command (masked) – mask M7…M0 specifies which bytes are written.
Table 4. ROP Field Encoding Summary
Table 3. OP Field Encoding Summary
CYCLE
CYCLE
.
.
CYCLE
TC59YM916BKG24A,32A,32B,40B,32C,40C
.
CYCLE
CYCLE
CYCLE
(the value is given by the expression (2*RA [7] + RA [6]).
(the value is given by the expression (2*RA [7] + RA [6]).
(the value is given by the expression (2*RA [7] + RA [6]).
Description
Description
2004-12-15 12/76
Rev 0.1