tc59ym916bkg24a ETC-unknow, tc59ym916bkg24a Datasheet - Page 45

• Manufacturer Part Number: tc59ym916bkg24a
• Description: The Second Generation 512-megabit Xdrtm Dram
• Manufacturer: ETC-unknow

Power State Management
XDR DRAM: Powerdown and Active. Powerdown state is to be used in applications in which it is necessary to shut
down the CFM/CFMN clock signals. In this state, the contents of the storage cells of the XDR DRAM will be
retained by an internal state machine which performs periodic refresh operations using the REFB and REFr
control registers.
the XDR DRAM must be precharged so they are left in a closed state. Also, all 2
current value of the REFr registers,
the end of this special set of refresh transactions
REFB register, no row of any bank will be skipped when automatic refresh is first started in Powerdown. There
may be some banks at the current row value in the REFr registers that are refreshed twice during the Powerdown
entry process.
t
Powerdown state after an interval of t
calculating the power dissipation of the XDR DRAM). The CFM/CFMN clock signals may be removed a time
t
(set to the ground reference) from the VTERM pins a time t
command. The voltage on the DQ/DQN pins will follow the voltage on the VTERM pins during Power Down entry.
generate internal refresh transactions. It will cycle through all 2
the largest value is reached and the REFB value wraps around, the REFr register is incremented to the next value.
The REFB and REFr values select which bank and which row are refreshed during the next automatic refresh
transaction.
broadcast write (SBW command) tranasaction using the serial bus of the XDR DRAM. This transaction writes the
value “00000001” to the Power Management (PM) register (SADR = “00000011”) of all XDR DRAMs connected to
the serial bus. This sets the PX bit of the PM register, causing the XDR DRAMs to return to Active power state.
termination voltage supply must be restored to its normal operating point (V
time tCFM-PDN before the end of the SBW transaction. The voltage on the DQ/DQN pins will follow the voltage on
the VTERM pins during Power Down exit.
transaction (this is the parameter that should be used for calculating the power dissipation of the XDR DRAM).
transaction,
the command “REFA 1”. No other request packets should be issued during this t
refresh transaction will use a “REFI” command to increment the REFr register (instead of a “REFR” command).
This ensures that no matter what value has been left in the REFB register, no row of any bank will be skipped
when normal refresh is restarted in Active state. There may be some banks at the current row value in the REFr
registers that are refreshed twice during the Powerdown exit process.
t
transactions must be issued after the burst of “n” transactions described above. This second burst consists of “m”
refresh transactions:
(where n = 2
CMD-PDN
PDN-CFM
PDN-CMD
Figure 46 shows power state transition diagrams for the XDR DRAM device. There are two power states in the
The upper diagram shows the sequence needed for Powerdown entry. Prior to starting the sequence, all banks of
After the last request packet (with the command CMDa in the upper diagram of the figure), an interval of
A COLX packet with the PDN command is issued after this interval, causing the XDR DRAM to enter
When the XDR DRAM is in Powerdown, an internal frequency source and state machine will automatically
The lower diagram shows the sequence needed for Powerdown exit. The sequence is started with a serial
The CFM/CFMN clock signals must be stable a time t
The XDR DRAM will enter Active state after an interval of t
The first request packet may be issued after an interval of t
All “n” banks (in the example, n = 2
Note that during the Powerdown state an internal time source keeps the device refreshed. However, during the
m = ceiling [2
Where “2
after the COLX packet with the PDN command. Also, the termination voltage supply may be removed
is observed. No request packets should be issued during this period.
interval, no internal refresh operations are performed. As a result, an additional burst of refresh
11
3
and must contain a “REFA” command in a ROWP packet
” is the number of rows per bank, and “2
) will use a “REFI” command (to increment the REFr register) instead of a “REFA” command.
3
*2
11
*t
PDN-CMD
/t
REF
and the REFr registers must NOT be incremented with the REFI command at
3
]
PDN-ENTRY
) must be refreshed using the current value of the REFr registers. The “nth”
. This ensures that no matter what value has been left in the
TC59YM916BKG24A,32A,32B,40B,32C,40C
has elapsed (this is the parameter that should be used for
3
” is the number of banks. Every “nth” refresh transaction
CFM-PDN
PDN-CFM
PDN − CMD
PDN-EXIT
3
before the end of the SBW transaction. Also, the
state combinations of the REFB register. When
after the COLX packet with the PDN
. In this example, this packet is denoted with
has elapsed from the end of the SBW
has elapsed from the end of the SBW
TERM, DRSL
3
PDN-CMD
banks must be refreshed using the
) on the VTERM pins a
interval.
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