tc59ym916bkg24a ETC-unknow, tc59ym916bkg24a Datasheet - Page 62

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tc59ym916bkg24a

Manufacturer Part Number
tc59ym916bkg24a
Description
The Second Generation 512-megabit Xdrtm Dram
Manufacturer
ETC-unknow
Datasheet
Supply Current Profile
parameter is shown under different operating conditions.
Timing Characteristics
the core timing parameters that are speed-bin dependent. Refer to the
information.
register read data.
power states.
In this section, Table 15 summarizes the supply current (I
Table 16 summarizes all timing parameters that characterize this memory component. The only exceptions are
The first section of parameters pertains to the timing of the DQ pins when driving read data.
The second section of parameters is concerned with the timing for the serial interface signals when driving
The third section of parameters is concerned with the time intervals needed by the interface to transition between
I
I
I
I
I
I
I
I
a. I
b. This does not include the I
c. I
DD, PDN
DD, STBY
DD, REF
DD, WR
DD, RD
TERM,DRSL,NONE
TERM,DRSL,RD
TERM,DRSL,WR
t
t
t
t
t
t
t
t
t
t
Q, DQ
QOFF, DQ
OR, DQ
OF, DQ
Q, SI
P, SI
OR, SI
OF, SI
PDN-ENTRY
PDN-EXIT
DD
TERM,DRSL
Symbol
Symbol
current @ V DD,MAX flowing into VDD pins.
,
,
current @ V
DRSL DQ output delay
(variation across 16 Q bits
on each DQ pin) from
drive points – output
delay
DRSL DQ output delay offset (a fixed value for all 16 Q bits on
each DQ pin) from drive points – output delay
DRSL DQ output – rise and fall times (20% – 80%)
Serial SCK-to-SDO output delay @ C
Serial SDI-to-SDO propagation delay @ C
Serial SDO output rise/fall (20% – 80%)
@ C
Time for power state to change after PDN entry
Time for power state to change after PDN exit
Device in PDN, Self Refresh enabled
Device in STBY. This is for a device in
STBY with no packets on the Channel.
Device in STBY and refreshing rows at the
t
ACT command every t
every t
ACT command every t
every t
No RD nor WR commands issued.
RD command every t CC
WR command every t CC
REF,MAX
LOAD, MAX
PP
PP
TERM,DQ,MAX
OL,DQ
, WR command every t
, RD command every t
period.
Parameter and Other Conditions
= 20 pF
sink current. The device dissipates I
Parameter
Table 16. Timing Characteristics
Table 15. Supply Current Profile
flowing into VTERM pins.
RR
RR
c
@ 2.500 ns > t
@ 3.333 ns > t
@ 3.830 ns ≥ t
c
, PRE command
, PRE command
CC
CC
LOAD, MAX
c
TC59YM916BKG24A,32A,32B,40B,32C,40C
.
a
.
LOAD, MAX
CYCLE
CYCLE
CYCLE
= 20 pF
@t
≥ 2.000 ns
≥ 2.500 ns
≥ 3.333 ns
DD
CYCLE
= 20 pF
) that characterizes this memory component. This
OL,DQ
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Min
=2.00ns
*V
TERM,DQ
Timing Parameters
−0.0625
−0.080
0.020
TBD
TBD
Min
2
0
@t
CYCLE
in each DQ/DQN pair when driving data.
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Max
=2.50ns
+0.0625
+0.080
0.040
TBD
TBD
Max
12
15
16
5
section for more
2004-12-15 62/76
@t
CYCLE
t
t
t
t
CYCLE
CYCLE
CYCLE
CYCLE
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Max
Unit
ns
ns
ns
ns
=3.33ns
Rev 0.1
Figure (s)
Figure 61
Figure 61
Figure 61
Figure 63
Figure 63
Figure 63
Figure 46
Figure 46
Unit
mA
mA
mA
mA
mA
mA
mA
µA

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