tc59ym916bkg24a ETC-unknow, tc59ym916bkg24a Datasheet - Page 54

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tc59ym916bkg24a

Manufacturer Part Number
tc59ym916bkg24a
Description
The Second Generation 512-megabit Xdrtm Dram
Manufacturer
ETC-unknow
Datasheet
M [7:0]
Write Masking
COLM packet. This masking logic permits individual bytes of a write data packet to be written or not written
according to the value of an eight bit write mask M [7:0].
These are treated as 2x16 8-bit bytes:
then the corresponding write enable signal (WE) is asserted and the byte is written into the sense amplifier. If they
are equal, then the corresponding write enable signal (WE) is deserted and the byte is not written into the sense
amplifier.
memory devices connected to the RQ bus (and receiving the command). It is the job of the memory controller to
search the 64-bytes to find an eight bit data value that is not used and place it into the M [7:0] field. This will
always be possible because there are 256 possible 8-bit values and there are only 64 possible values used in the
bytes in the data packet.
Figure 51. Byte Mask Logic
Figure 51 shows the logic used by the XDR DRAM device when a write-masked command (WRM) is specified in a
In Figure 51, there are 16 sets of 16 bit signals forming the D1 [15:0] [15:0] input bus for the Byte Mask block.
The eight bits of each byte is compared to the value in the byte mask field (M [7:0]). If they are not equal (NE),
In the example of Figure 52, a WRM command performs a masked write of a 64-byte data packet to all the
D1 [15] [15:8]
D1 [15] [7:0]
D1 [1] [15:8]
D1 [1] [7:0]
D1 [0] [15:8]
D1 [0] [7:0]
WIDTH [2:0]
S [15] [15:8]
...
D1 [15] [15:8]
SC [3:0]
M [7:0]
8
8
8
D1 [15] [15:8]
4+3
8
8
WE-MSB
Compare
[15]
NE
8
1
Dynamic Width Demux (WR)
S [15] [7:0]
D1 [15] [7:0]
8
8
8
16x16
Byte Mask (WR)
16x16
16x16
D [15:0] [15:0]
D1 [15] [7:0]
8
Compare
WE-LSB
D1 [15:0] [15:0]
[15]
NE
8
1
S [15:0] [15:0]
TC59YM916BKG24A,32A,32B,40B,32C,40C
Dynamic Width Mux (RD)
16x16
16x16
Q [15:0] [15:0]
S [0] [15:8]
D1 [0] [15:8]
8
8
8
D1 [0] [15:8]
8
Compare
WE-MSB
[0]
NE
8
1
2004-12-15 54/76
S [0] [7:0]
D1 [0] [7:0]
8
8
8
4+3 WIDTH [2:0]
D1 [0] [7:0]
SC [3:0]
8
Rev 0.1
Compare
WE-LSB
NE
[0]
8
1

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