tc59ym916bkg24a ETC-unknow, tc59ym916bkg24a Datasheet - Page 38

• Manufacturer Part Number: tc59ym916bkg24a
• Description: The Second Generation 512-megabit Xdrtm Dram
• Manufacturer: ETC-unknow

Figure 26. Refresh Low (REFL) Row Register
Figure 27. IO Configuration (IOCFG) Register
Figure 28. Current Calibration 0 (CC0) Register
Figure 29. Current Calibration 1 (CC1) Register
Figure 30. Impedance Calibration 0 (ZC0) Register
7
7
7
7
7
reserved
reserved
6
6
6
6
6
5
5
5
5
5
reserved
4
4
4
4
4
reserved
R [7:0]
CCVALUE0 [5:0]
CCVALUE1 [5:0]
3
3
3
3
3
2
2
2
2
2
ODF [1:0]
1
1
1
1
1
TC59YM916BKG24A,32A,32B,40B,32C,40C
0
0
0
0
0
Refresh Low Row Register
SADR [7:0]: 00001011
R [7:0] – Refresh row field.
be refreshed during the next refresh interval. This row address will
be incremented after a REFI command for auto-refresh, or when
the BANK [2:0] field for the REFB register equals the maximum
bank address for self-refresh.
Current Calibration 0 Register
SADR [7:0]: 00010000
ODF [1:0] – Overdrive Function field.
Current Calibration 0 Register
SADR [7:0]: 00010000
CCVALUE0 [5:0] – Current calibration value field.
even-numbered DQ and DQN pins.
Current Calibration 1 Register
SADR [7:0]: 00010001
CCVALUE1 [5:0] – Current calibration value field.
odd-numbered DQ and DQN pins.
Impedance Calibration 0 Register
SADR [7:0]: 00010010
00 – Nominal VOSW,DQ range
01 – reserved
10 – reserved
11 – reserved
This field controls the amount of current drive for the
This field controls the amount of current drive for the
reserved
This field contains the low-order bits of the row address that will
2
2
2
2
2
REFL [7:0] resets to 00000000
CC0 [7:0] resets to 00001111
CC0 [7:0] resets to 00001111
CC1 [7:0] resets to 00001111
ZC0 [7:0] resets to 00000000
2004-12-15 38/76
Read/write register
Read/write register
Read/write register
Read/write register
Read/write register
Rev 0.1
2
2
2
2
2