r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 662

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
FMR22 Bit (Interrupt request suspend request enable bit)
FMR24 Bit (Flash memory wait cycle control bit)
FMR27 Bit (Low-current-consumption read mode enable bit)
When the FMR22 bit is set to 1 (erase-suspend request enabled by interrupt request), the FMR21 bit is
automatically set to 1 (erase-suspend request) when an interrupt request is generated during auto-erasure.
Set the FMR22 bit to 1 when using erase-suspend while rewriting the user ROM area in EW1 mode.
When the FMR24 bit is 0, one wait cycle is required for program ROM and three wait cycles are required for
data flash.
When the FMR24 bit is 1, zero wait cycle is required for program ROM and one wait cycle is required for data
flash.
When the FMR27 bit is set to 1 (low-current-consumption read mode enabled) in low-speed clock mode (XIN
clock stopped) or low-speed on-chip oscillator mode (XIN clock stopped), power consumption when reading
the flash memory can be reduced. Refer to 10.6.11 Low-Current-Consumption Read Mode for details.
Low-current-consumption read mode can be used when the CPU clock is set to the low-speed on-chip oscillator
clock divided by 4, 8, or 16. Do not use low-current-consumption read mode when the clock is divided by 1 (no
division) or 2. After setting the division ratio of the CPU clock, set the FMR27 bit to 1.
When entering wait mode or stop mode while the FMR27 bit is 1 (low-current-consumption read mode
enabled), set bits CM37 and CM36 in the CM3 register to 00b (return using the CPU clock used immediately
before entering wait or stop mode), and the CM35 bit to 0 (settings of CM06 bit in CM0 register and bits CM16
and CM17 in CM1 register are enabled).
When the FMR27 bit is 1 (low-current-consumption read mode enabled), do not execute any program, block
erase, or lock bit program commands. To change the FMSTP bit from 1 (flash memory stops) to 0 (flash
memory operates), make the setting when the FMR27 bit is 0 (low-current-consumption read mode disabled).
Preliminary document
Specifications in this document are tentative and subject to change.
26. Flash Memory
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