r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 489

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
21.2.5
Notes:
21.2.5.1
After Reset
1. In master mode, make the setting according to the required transfer rate. For details on the transfer rate, refer to
2. When the MST bit is 1 (master mode), the SSCK pin functions as the transfer clock output pin. When the
3. In multimaster operation, use the MOV instruction to set the MST bit.
4. When the MST bit is 0 (slave mode), do not set the RCVD bit to 1.
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 000E6h (SICR1_0)
In the SICR1 register, the bit functions differ depending on the SSU function and the I
21.3.1.1 Transfer Clock .
CE_ADZ bit in the SISR register is set to 1 (conflict error), the MST bit is set to 0 (slave mode).
Symbol
Symbol
RCVD
Bit
CKS0
CKS1
CKS2
CKS3
MST
TRS
ICE
SI Control Register 1 (SICR1)
Preliminary document
Specifications in this document are tentative and subject to change.
SSU Function
ICE
b7
0
Transfer clock select bits
Reserved
Master/slave select bit
Receive disable bit
Reserved
RCVD
b6
0
Bit Name
MST
b5
(4)
0
(2, 3)
(1)
TRS
b4
0
Other than the above: Do not set.
Set to 0.
0: Slave mode
1: Master mode
0: Next receive operation continues
1: Next receive operation disabled
Set to 0.
CKS3
b3 b2 b1 b0
0 0 0 0: f1/256
0 0 0 1: f1/128
0 0 1 0: f1/64
0 0 1 1: f1/32
0 1 0 0: f1/16
0 1 0 1: f1/8
0 1 1 0: f1/4
b3
0
CKS2
b2
0
21. Clock Synchronous Serial Interface
Function
CKS1
b1
0
CKS0
2
b0
C bus function.
0
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