r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 330
r5f21368sdfp
Manufacturer Part Number
r5f21368sdfp
Description
Renesas Mcu R8c Family / R8c/3xt-a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5F21368SDFP.pdf
(760 pages)
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Part Number:
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Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
Figure 17.11
• Bits TOB, TOC, and
• Bits TOB, TOC, and
TOD in TRCCR1
register are 0,
initial output is low.
TOD in TRCCR1
register are 1,
initial output is high.
Figure 17.11 shows an Operation Example in PWM Mode (Duty Cycle 0%, Duty Cycle 100%).
Preliminary document
Specifications in this document are tentative and subject to change.
Operation Example in PWM Mode (Duty Cycle 0%, Duty Cycle 100%)
TRCGRA register
TRCGRB register
TRCGRA register
TRCGRB register
TRCGRA register
TRCGRB register
TRCGRA register
TRCGRB register
TRCGRA register
TRCGRB register
TRCGRA register
TRCGRB register
TRCIOB
TRCIOB
TRCIOB
TRCIOB
TRCIOB
TRCIOB
0000h
0000h
0000h
0000h
0000h
0000h
register value
register value
register value
register value
register value
register value
TRCCNT
TRCCNT
TRCCNT
TRCCNT
TRCCNT
TRCCNT
Note:
1. The TRCGRB register is rewritten.
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 1)
Duty cycle 100%
Duty cycle 100%
(Note 1)
(Note 1)
(Note 1)
(Note 1)
Duty cycle 0%
Duty cycle 0%
Duty cycle 0%
Duty cycle 100%
Output remains unchanged when compare
matches in the period and duty cycle registers
occur simultaneously.
Output remains unchanged when compare
matches in the period and duty cycle registers
occur simultaneously.
Output remains unchanged when compare
matches in the period and duty cycle registers
occur simultaneously.
Output remains unchanged when compare
matches in the period and duty cycle registers
occur simultaneously.
(Note 1)
(Note 1)
(Note 1)
(Note 1)
Duty cycle 100%
Duty cycle 0%
Page 299 of 725
17. Timer RC
(Note 1)
(Note 1)
Time
Time
Time
Time
Time
Time
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