r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 296
r5f21368sdfp
Manufacturer Part Number
r5f21368sdfp
Description
Renesas Mcu R8c Family / R8c/3xt-a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5F21368SDFP.pdf
(760 pages)
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Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
16.5.2
In timer RB2, the TWRC bit in the TRBMR register can be used to select whether only registers TRBPRE,
TRBPR, and TRBSC are written or the register, prescaler, and counter are written. However, when the TCSTF
bit in the TRBCR register is 0 (count stops), the register, prescaler, and counter are written regardless of the
setting of the TWRC bit in the TRBMR register. When the TWRC bit is set to 1 (write to reload register only)
and only the register is written, periods can be switched smoothly from pre- to post-settings without any
irregular period.
During programmable one-shot and programmable wait one-shot generation modes, when the TCSTF bit in the
TRBCR register is 1 (count in progress) and the TOSSTF bit in the TRBOCR register is 0 (one-shot is stopped),
the reload register and counter can be written because the setting of the TWRC bit in the TRBMR register is
invalid.
Figure 16.10 shows an Example of Prescaler and Counter Operation in 8-Bit Timer with 8-Bit Prescaler. Figure
16.12 shows an Example of Counter Operation in 16-Bit Timer.
When the TCSTF bit is 1 (count in progress), even if the TWRC bit is set to 0 (write to reload register and
counter), the count value is not updated immediately after the write instruction is executed because transfer to
the prescaler and counter is performed in synchronization with the count source.
Prescaler and Counter Operation Using TWRC Bit
Preliminary document
Specifications in this document are tentative and subject to change.
Page 265 of 725
16. Timer RB2
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