r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 530

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
21.4.2.5
In slave transmit mode, the slave device outputs the transmit data while the master device outputs the receive
clock and returns an acknowledge signal. Figures 21.23 and 21.24 show the Operation Timing in Slave
Transmit Mode (I
The transmit procedure and operation in slave transmit mode are as follows:
(1) Set the ICE bit in the SICR1 register to 1 (transfer operation enabled). Then, set bits CPOS_WAIT and
(2) When the slave address matches at the first frame after detecting the start condition, the slave device
(3) When the TDRE bit is set to 1 after the last transmit data is written to the SITDR register, wait until the
(4) Set the TRS bit to 0 and perform a dummy read of the SIRDR register to complete the process. This will
(5) Set the TDRE bit to 0.
MLS in the SIMR1 register and bits CKS0 to CKS3 in the SICR1 register (initial setting). Next, set bits
TRS and MST in the SICR1 register to 0 and wait until the slave address matches in slave receive mode.
outputs the level set by the CEIE_ACKBT bit in the SIER register to the SDA pin between the falling edge
of the 8th clock cycle and the falling edge of the 9th clock cycle. If the 8th bit of data (R/W) is 1, the TRS
bit and the TDRE bit in the SISR register are set to 1, and the mode is switched to slave transmit mode
automatically. Continuous transmission is enabled by writing transmit data to the SITDR register every
time the TDRE bit is set to 1.
TEND bit in the SISR register is set to 1 while the TDRE bit is 1. After the TEND bit is set to 1, set the
TEND bit to 0.
release the SCL signal.
Preliminary document
Specifications in this document are tentative and subject to change.
Slave Transmit Operation
2
C bus Interface Mode).
21. Clock Synchronous Serial Interface
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