r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 445

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
Figure 20.6
20.3.1.5
20.3.1.6
The U2LCH bit in the U2C1 register is used to select whether the logic of serial data is inverted.
If the U2LCH bit is set to 1 (inverted), the data written to the U2TB register has its logic inverted before being
transmitted. Similarly, the received data has its logic inverted when read from the U2RB register. Figure 20.6
shows the Serial Data Logic Switching.
The CTS function is used to start transmit and receive operation when a low level is applied to the CTS2 pin.
Transmit and receive operation begins when the CTS2 pin is held low.
If the input level is switched to high during transmit or receive operation, the operation stops before the next
data.
For the RTS function, the RTS2 pin outputs a low level when the MCU is ready for a receive operation. The
output level goes high at the first falling edge of the RXD2 pin.
• CRD bit in the U2C0 register = 1 (CTS/RTS function disabled):
• CRD bit = 0 and CRS bit = 0 (CTS function selected):
• CRD bit = 0 and CRS bit = 1 (RTS function selected):
CTS2 pin input is unused, and RTS2 pin output is high
CTS2 pin input is active, and RTS2 pin output is high
CTS2 pin input is unused, and RTS2 pin output is active
Preliminary document
Specifications in this document are tentative and subject to change.
Serial Data Logic Switching Function
Serial Data Logic Switching
CTS/RTS Function
(1) U2LCH Bit in U2C1 Register = 0 (not inverted)
(2) U2LCH Bit in U2C1 Register = 1 (inverted)
The above applies under the following conditions:
• CKPOL bit in U2C0 register = 0 (transmit data is output at the falling edge and receive data
• UFORM bit in U2C0 register = 0 (LSB first)
is input at the rising edge of the transfer clock)
Transfer Clock
Transfer Clock
(not inverted)
(inverted)
TXD2
TXD2
D0
D0
D1
D1
D2
D2
D3
D3
D4
D4
D5
D5
D6
D6
D7
D7
20. Serial Interface (UART2)
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