r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 302

• Manufacturer Part Number: r5f21368sdfp
• Description: Renesas Mcu R8c Family / R8c/3xt-a Series
• Manufacturer: Renesas Electronics Corporation.

Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
16.6
16.7
When the TRBIF bit in the TRBIR register is 1 (interrupt requested) and the TRBIE bit is 1 (interrupt enabled), an
interrupt request is generated to the CPU. The conditions for setting the TRBIF bit to 1 differ depending on the
mode. Refer to the descriptions of the TRBIF bit and individual modes.
In programmable one-shot and programmable wait one-shot generation modes, when 1 (one-shot count starts) is
written to the TOSST bit in the TRBCR register or a trigger is input to the INT0 pin with the TCSTF bit in the
TRBCR register set to 1 (count enabled), one-shot operation is started.
When using the trigger input from the INT0 pin, make the following settings beforehand.
(1) Set the PD4_5 bit in the PD4 register to 0 (input port).
(2) Set bits INT0F0 and INT0F1 in the INTF register to select the digital filter sampling clock for the INT0 pin.
(3) Select one edge or both edges using the INT0PL bit in the INTEN register. When one edge is selected, select
(4) Set the INT0EN bit in the INTEN register to 1 (enabled) to enable an interrupt.
(5) Set the INOSTG bit in the TRBIOC register to 1 (one-shot trigger to INT0 pin enabled).
When an interrupt request is generated by the trigger input from the INT0 pin, note the following:
• Select one edge or both edges using the INT0PL bit. When one edge is selected, select falling or rising edge using
• While the TOSSTF bit in the TRBOCR register is 1 (one-shot is operating (including wait period)), even if a one-
• For details on interrupts, refer to 11. Interrupts.
the INT0POL bit in the INTPOL register (the IN0SEG bit in the TRBIOC register (the one-shot trigger polarity
select bit is unrelated to INT0 interrupt)).
shot trigger is generated the operation of timer RB2 will be unaffected. However, the IR bit in the INT0IC register
will change.
falling or rising edge using the INOSEG bit in the TRBIOC register.
Interrupt Requests
INT0 Input Trigger Selection
Preliminary document
Specifications in this document are tentative and subject to change.
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16. Timer RB2