r5f21368sdfp Renesas Electronics Corporation., r5f21368sdfp Datasheet - Page 594
r5f21368sdfp
Manufacturer Part Number
r5f21368sdfp
Description
Renesas Mcu R8c Family / R8c/3xt-a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5F21368SDFP.pdf
(760 pages)
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Part Number:
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Renesas Electronics America
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Under development
R8C/36T-A Group
R01UH0240EJ0001 Rev.0.01
Apr 28, 2011
Figure 24.3
Figure 24.4
24.3.1
INTiCOUT
Sampling
Note:
IR bit in
register
Port direction
INTiIC
Comparator Bi can use the same digital filter as the INTi input. The sampling clock can be selected by bits
INTiF0 and INTiF1 in the INTF register. The INTiCOUT signal output from comparator Bi is sampled every
sampling clock. When the level matches three times, the IR bit in the INTiIC register is set to 1 (interrupt
requested).
Figure 24.3 shows the Configuration of Comparator Bi (i = 0 or 3) Digital Filter and Figure 24.4 shows an
Operation Example of Comparator Bi (i = 0 or 3) Digital Filter.
timing
signal
1. The above diagram applies under the following condition:
Bits INTiF1 and INTiF0 in the INTF register are set to 01b, 10b, or 11b (digital filter used).
IVCMPi
register
IVREFi
Comparator Bi Digital Filter (i = 1 or 3)
INTi
Preliminary document
Specifications in this document are tentative and subject to change.
Configuration of Comparator Bi (i = 0 or 3) Digital Filter
Operation Example of Comparator Bi (i = 0 or 3) Digital Filter
INTiCP0, INTiCOUT: Bits in INTCMP register
INTiF0, INTiF1: Bits in INTF register
INTiEN, INTiPL: Bits in INTEN register
INTiCOUT
+
-
f32
INTiF1 and INTiF0
f1
f8
= 01b
= 10b
= 11b
INTiCP0 = 0
INTiCP0 = 1
Sampling clock
Digital filter
(matches
3 times)
= other than 00b
INTiF1 and INTiF0
= 00b
Set to 0 by a program
INTiEN
Both edge
detection
circuit
INTiPL = 0
INTiPL = 1
To INTi interrupt
24. Comparator B
Page 563 of 725
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