MT90222AG Zarlink Semiconductor, MT90222AG Datasheet - Page 94

• Manufacturer Part Number: MT90222AG
• Description: Description = 4 Port Ima & TC PHY For T1, E1 And DSL ;; Package Type = N/a ;; No. Of Pins =
• Manufacturer: Zarlink Semiconductor

Address (Hex):
Direct access
Reset Value (Hex):
Address (Hex):
Direct access
Reset Value (Hex):
15:14
13:12
Bit #
Bit #
15:0
3:2
1:0
...
Type
Type
R/W
R/W
R/W
R/W
R/W
...
These 2 bits select the type of cells stored in the RX ICP Cell buffer for physical link 15.
00: valid RX ICP Cells with changes.
01: All valid RX ICP Cells.
10: All valid RX Cells.
11: No cell written into RX buffer.
These 2 bits select the type of cells stored in the RX ICP Cell buffer for physical link 14.
00: valid RX ICP Cells with changes.
01: All valid RX ICP Cells.
10: All valid RX Cells.
11: No cell written into RX buffer.
...
These 2 bits select the type of cells stored in the RX ICP Cell buffer for physical link 9.
00: valid RX ICP Cells with changes.
01: All valid RX ICP Cells.
10: All valid RX Cells.
11: No cell written into RX buffer.
These 2 bits select the type of cells stored in the RX ICP Cell buffer for physical link 8.
00: valid RX ICP Cells with changes.
01: All valid RX ICP Cells.
10: All valid RX Cells.
11: No cell written into RX buffer.
When a bit is set to 1, the corresponding new cell placed in the RX ICP Cell FIFO is
pre-processed to determine which byte(s) were changed when compared to the previous
cell placed in the RX ICP buffer.
When a bit is set to 0, it means that no pre-processing is to take place.
0x0101 (1 reg)
Access for RX link 15, 14, 13, 12, 11, 10, 9, 8
0000
0x0102 (1 reg)
1 bit per RX Links.
0000
Table 47 - RX Cell Process Enable Register
Table 46 - RX Cell Type RAM Register 2
Zarlink Semiconductor Inc.
MT90222/3/4
94
Description
Description
Data Sheet