MT90222AG Zarlink Semiconductor, MT90222AG Datasheet - Page 68

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MT90222AG

Manufacturer Part Number
MT90222AG
Description
Description = 4 Port Ima & TC PHY For T1, E1 And DSL ;; Package Type = N/a ;; No. Of Pins =
Manufacturer
Zarlink Semiconductor
Datasheet
cells that were received on the corresponding Utopia port address. This counter is defined by the value 0x0177 in
the Select Counter Register (0x0432).
6.2
The MT90222/3/4 can generate interrupts from many sources. All interrupt sources can be enabled or disabled.
Write action is required to clear the source of interrupt. Interrupts are grouped on a per link basis, with six
sub-categories for each link and two special types for the IMA Group configuration. These special interrupts are only
present in the Link 0 IRQ Status register. Refer to Figure 18 for a representation of the interrupt register hierarchy.
6.2.1
There is a IRQ Master Status (0x0455) register that reports interrupts generated by any event on any of the links.
Each bit of this register corresponds to a link. A ’1’ in a bit position indicates that the associated link is reporting an
interrupt condition. For each bit in the IRQ Master Status (0x0455) register, there is a corresponding bit in the IRQ
Master Enable (0x0433) register. When any IRQ source is active and the corresponding Enable bit is ’1’, then the
IRQ pin will go LOW (active).
Transfer
Interrupt Block
Frame
Pulse
Done
IRQ Master Status and IRQ Master Enable Registers
Handler Register
TX ICP Cell
0
7
7
0
RX FIFO Overflow
S
T
A
T
U
S
E
N
A
B
E
L
READY BIT/ICP CELL TIME *
4 UTOPIA
TC Link Overflow Status
Counters
1 UTOPIA
Counters
Counters
4 RX
4 TX
Overflow in ICP pre-proc
IMA GRP CNTRS *
Figure 18 - IRQ Register Hierarchy
Link 15
End of LODS
New RX ICP
End of LCD
End of LIF
Link 14
S
T
A
T
U
S
Zarlink Semiconductor Inc.
MT90222/3/4
Link 13
1 set of registers
Group Counters
LODS
OVERFLOW
.......
UTOPIA IMA
LCD
IMA Group
LIF
Link 3
IV
Registers
E
N
A
B
E
L
16 x IRQ
Link 2
Link
11
68
0
Link 1
S
T
A
T
U
S
S
T
A
T
U
S
Link 0
E
N
A
B
E
L
7
OVERFLOW
0
8 registers
IMA
S
T
A
T
U
S
Link 15
Link 0
1 UTOPIA
RX FIFO Overflow
4 UTOPIA
Counters
Registers
1 x IRQ
Master
S
T
A
T
U
S
Note *: These 2 IRQ signals are
only present in IRQ Link Status
register (0x0435) for Link 0.
N
E
A
B
L
E
IRQ PIN
Data Sheet

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