MT90222AG Zarlink Semiconductor, MT90222AG Datasheet - Page 80

• Manufacturer Part Number: MT90222AG
• Description: Description = 4 Port Ima & TC PHY For T1, E1 And DSL ;; Package Type = N/a ;; No. Of Pins =
• Manufacturer: Zarlink Semiconductor

Address (Hex):
Direct access
Reset Value (Hex):
Address (Hex):
Direct access
Reset Value (Hex):
Address (Hex):
Direct access
Reset Value (Hex):
Bit #
15:13
Bit #
12:8
15:13
15
14
Bit #
7:5
4:0
...
12:8
1
0
7:5
4:0
Type
R/W
R/W
R/W
R/W
Type
R/W
R/W
...
Type
R
R
R/W
R/W
R
R
Enable UTOPIA PHY address of link 15. A 1 enables the PHY port Address, non-IMA
mode.
Enable UTOPIA PHY address of link 14. A 1 enables the PHY port Address, non-IMA
mode.
...
Enable UTOPIA PHY address of link 1. A 1 enables the PHY port Address, non-IMA mode.
Enable UTOPIA PHY address of link 0. A 1 enables the PHY port Address, non-IMA mode.
Unused. Read all 0’s.
UTOPIA PHY Address of IMA Group N+4.
Unused. Read all 0’s.
UTOPIA PHY Address of IMA Group N.
UTOPIA PHY Address of Link N+8 when in non-IMA mode.
Unused. Read all 0’s.
Unused. Read all 0’s.
UTOPIA PHY Address of Link N when in non-IMA mode.
0x0050 (1 reg)
1 register to enable the links in non-IMA mode.
0000
0x0040-0x0047 (8 reg)
1 register per 2 links in non-IMA mode. Link 0 is paired with link 8, link 1 with link
9 and so on
0000
0x0048-0x004B (4 reg)
1 register per 2 IMA Groups. IMA group 0 is paired with IMA group 4, IMA group 1
with IMA group 5 and so on. For MT90222 only groups 0,1,2 and 3 are used.
0000
Table 14 - UTOPIA Input Link PHY Enable Register
Table 13 - UTOPIA Input Group Address Registers
Table 12 - UTOPIA Input Link Address Registers
Zarlink Semiconductor Inc.
MT90222/3/4
80
Description
Description
Description
Data Sheet