MT90222AG Zarlink Semiconductor, MT90222AG Datasheet - Page 55

• Manufacturer Part Number: MT90222AG
• Description: Description = 4 Port Ima & TC PHY For T1, E1 And DSL ;; Package Type = N/a ;; No. Of Pins =
• Manufacturer: Zarlink Semiconductor

This mode is selected in TDM TX Link Control (0x0600-0x060F) and TDM RX Link Control (0x0700-0x070F) by
the following settings.
4.1.3
This is used for T1/E1 connection with ST-BUS, where data rate is 2.048 Mb/s, clock is 4.096 MHz and frame pulse
is 8KHz. A standard ST-BUS mode is supported with 32 time slots in each frame. The Frame format and clock speed
meet the ST-BUS or MVIP standard. The mapping registers are used to determine which of the 32 time slots are
used to carry TDM traffic.
Note: Both frame pulse polarity and clock edge are programmable.
Note: Frame pulse polarity and clock edge are fixed in ST-BUS mode.
RXSYNC
Serial Bit
Stream
TXCK
RXCK
ST-BUS
Bit Cells
(DSTx0-15)
TXSYNC
Data rate (bits 6:5) = 01
Multiplex mode (bits 4:3) = 00
Clock and Sync format (bit 2) = 0
Cell delineation mode (bit 10 of TDM RX Link Control only) = 0
Single mode -ST-BUS
ST-BUS
Bit Cells
(DSTx0-15)
Serial Bit
Stream
TXSYNC
RXSYNC
TXCK
RXCK
Channel 31 bit 0
Bit Cell
Channel 31 bit 0
Bit Cell
Figure 12 - Single mode - Generic 2.048 MHz
Channel 0 bit 7
Figure 13 - Single mode - ST-BUS
Bit Cell
Channel 0 bit 7
Zarlink Semiconductor Inc.
MT90222/3/4
Bit Cell
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Channel 0 bit 0
Bit Cell
Channel 0 bit 0
Bit Cell
Channel 1 bit 7
Bit Cell
Channel 1 bit 7
Bit Cell
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Data Sheet