MT90222AG Zarlink Semiconductor, MT90222AG Datasheet - Page 105

• Manufacturer Part Number: MT90222AG
• Description: Description = 4 Port Ima & TC PHY For T1, E1 And DSL ;; Package Type = N/a ;; No. Of Pins =
• Manufacturer: Zarlink Semiconductor

Address (Hex):
Direct access
Reset Value (Hex):
Address (Hex):
Direct access
Reset Value (Hex):
Address (Hex):
Direct access
Reset Value (Hex):
Bit #
Bit #
15:0
15:9
Bit #
15:8
7:6
3:0
8
5
4
Type
Type
R/W
R/W
R/W
R/W
R/W
Type
R/W
R
R
Each bit reports the recombiner status for a link. A 1 means that the recombiner is
enabled. The bit 15 reports for link 15, bit 14 reports for link 14 and so on so forth.
Do not write to this register.
Unused. Read all 0’s.
Reserved. Write 0 for normal operation.
Value of M. These 2 bits specifies the value of M for the IMA Group.
00: M=32
01: M=64
10: M=128
11: M=256
Timing Mode inserted in ICP cell. A 0 means that the ITC timing mode is inserted in the
ICP cell and a 1 means that the CTC timing mode is inserted in the ICP cell.
Timing Mode in RoundRobin scheduler. A 0 means that the ITC timing mode is selected
and a 1 means that the CTC timing mode is selected for internal operation.
Reference Link. These 4 bits define which physical link is to be used as reference for
timing purposes.
Defines the ICP cell offset of link N+8. The value of M determines which significant bits
are used as follows:
M=256; bits 7-0 are used,
M=128; bits 6-0 are used,
M=64; bits 5-0 are used,
M=32; bits 4-0 are used.
link 1 with link 9, and so on.For MT90222 only groups 0,1,2 and 3 are used.
0x02AD
0000
0x0300 - 0x0307 (8 reg)
1 register per TX IMA Group.For MT90222 only groups 0,1,2 and 3 are used.
B0
0x0310 - 0x0317 (8 reg)
1 register per 2 links, used in IMA mode only. Link 0 is paired with link 8,
physical link #
Table 72 - Enable Recombiner Status Register
Table 73 - TX Group Control Mode Registers
Table 74 - TX ICP Cell Offset Registers
(1 reg)
Zarlink Semiconductor Inc.
MT90222/3/4
105
Description
Description
Description
Data Sheet