MT90222AG Zarlink Semiconductor, MT90222AG Datasheet - Page 135

• Manufacturer Part Number: MT90222AG
• Description: Description = 4 Port Ima & TC PHY For T1, E1 And DSL ;; Package Type = N/a ;; No. Of Pins =
• Manufacturer: Zarlink Semiconductor

AC Electrical Characteristics - Utopia Interface Transmit Timing ( 25MHz)
- Multi-PHY operation with up to 8 input loads of 10pF each (80pF total)
AC Electrical Characteristics - UTOPIA Interface Receive Timing ( 25MHz)
- Multi-PHY operation with up to 8 input loads of 10pF each (80pF total)
UTxClk
UTxData[15:0], UTxSOC,
UTxPAR, UTxEnb,
UTxAddr[4:0]
UTxClav[0]
URxClk
URxEnb, URxAddr[4:0]
URxData[15:0],
URxSOC, URxClav[0],
URxPAR
Signal name
Signal name
A->P
A->P
A<-P
DIR
A->P
A->P
A<-P
DIR
Item
tT10
tT12
tT11
tOD
tT2
tT3
tT4
tT5
tT6
tT8
tT9
Item
tT10
tT12
tT11
f1
tOD
tT2
tT3
tT4
tT6
tT8
tT9
tT5
f1
Zarlink Semiconductor Inc.
RxClk frequency (nominal)
Input setup to RxClk
Output delay from RxClk
Signal going high impedance to RxClk
Signal going high impedance from RxClk
RxClk duty cycle
RxClk peak-to-peak jitter
RxClk rise/fall time
Input hold from RxClk
Output hold from RxClk
Signal going low impedance to RxClk
Signal going low impedance from RxClk
MT90222/3/4
TxClk frequency (nominal)
TxClk duty cycle
TxClk peak-to-peak jitter
TxClk rise/fall time
Input setup to TxClk
Input hold from TxClk
Output delay from TxClk
Output hold from TxClk
Signal going low impedance to TxClk
Signal going high impedance to TxClk
Signal going low impedance from TxClk
Signal going high impedance from TxClk
135
Description
Description
10 ns
10 ns
10 ns
10 ns
Min.
40%
Min.
40%
1 ns
1 ns
0 ns
1 ns
1 ns
1 ns
1 ns
0 ns
1 ns
1 ns
0
0
-
-
-
-
-
-
Data Sheet
25 MHz
25 MHz
27 ns
27 ns
Max.
Max.
60%
4 ns
60%
4 ns
5%
5%
-
-
-
-
-
-
-
-
-
-
-
-
-
-