MT90222AG Zarlink Semiconductor, MT90222AG Datasheet - Page 102

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MT90222AG

Manufacturer Part Number
MT90222AG
Description
Description = 4 Port Ima & TC PHY For T1, E1 And DSL ;; Package Type = N/a ;; No. Of Pins =
Manufacturer
Zarlink Semiconductor
Datasheet
Address (Hex):
Direct access
Reset Value (Hex):
Address (Hex):
Synchronized access Set address before the transfer is initiated with the RX External SRAM Control
Reset Value (Hex):
Address (Hex):
Direct access
Reset Value (Hex):
Bit #
Bit #
15:8
15:9
7:0
3:0
15:11
Bit #
8
7
6
5
4
10:0
Type
Type
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
Type
R
R
Unused. Read all 0’s
RX External SRAM Read/Write data register.
Unused. Read all 0’s
Reserved. Write 0 for normal operation.
Reserved. Write 0 for normal operation.
Reserved. Write 0 for normal operation.
Set to 1 to enable uP access to the External SRAM, for test purposes.
Clear to 0 for normal operation.
Reserved. Write 0 for normal operation.
Number of the physical link associated with the value in the RX Delay register. This value
is not valid when reading the Maximum Delay over time.
0x0285
This register contains the delay value (in number of cells) selected by the RX
0004
0x0284 (1 reg)
0000
0x0286
This register contains the link number associated with the RX Delay value
0000
register
Delay Select Register. The value always include the current guardband delay.
Register
Sign bits (same value as bit 10)
Delay Value.
Table 63 - RX External SRAM Read/Write Data
Table 65 - RX Delay Link Number Register
(1 reg)
(1 reg)
Table 64 - RX Delay Register
Zarlink Semiconductor Inc.
MT90222/3/4
102
Description
Description
Description
Data Sheet

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