MT90222AG Zarlink Semiconductor, MT90222AG Datasheet - Page 35

• Manufacturer Part Number: MT90222AG
• Description: Description = 4 Port Ima & TC PHY For T1, E1 And DSL ;; Package Type = N/a ;; No. Of Pins =
• Manufacturer: Zarlink Semiconductor

•
•
•
•
•
•
The input port can be enabled to remove (filter) Unassigned or Idle cells. If Unassigned or Idle Cell Filtering is
enabled, the device checks for and discards Unassigned or Idle cells. This function is programmed in the UTOPIA
Input Control (0x0052) register.
Section 5.0 describes the UTOPIA Interface in more detail.
ATM In
either passes or removes incoming Idle cells
either passes or removes incoming Unassigned cells
provides a counter per UTOPIA port for the total number of Idle/Unassigned/Filler cells with a valid HEC or
optionally the total number of User cells (24 bits/16 bit latched)
provides a counter per UTOPIA port for the total number of cells with wrong incoming HEC (24 bits/16 bit
latched)
provides a counter per UTOPIA port for the total number of cells handled (24 bits/16 bit latched)
provides counters for Parity errors
from IDCR Generator
Micro I/F
UTOPIA L2
Interface
Control
Cell In
Figure 5 - MT90224 Functional Block Diagram -Transmitter in IMA Mode
Filler Cell
Idle Cell
ICP Cell Group 0
ICP Cell Group 1
ICP Cell Group 7
ICP Cell Buffer RAM
Next ICP Cell Group 0
Next ICP Cell Group 1
Next ICP Cell Group 7
TX Utopia FIFO
TX Utopia FIFO
FIFO Link 15
(see Note 1)
(see Note 1)
(see Note 1)
FIFO Link 0
FIFO Link 1
Transmitter
Cell RAM
Group 0
Group 7
Zarlink Semiconductor Inc.
MT90222/3/4
to Cell_In_Control
Round Robin Scheduler
and Adaptive Shaper
and FIFO Selection
35
ICP Cell Mod. and
ICP Cell Mod. and
ICP Cell Mod. and
Cell Scrambling
Cell Scrambling
Cell Scrambling
(1 of 8)
ICP Cell Handler
IDCR Generator
Transmitter
Link Timing
Reference
Note 1: This FIFO is the
TX UTOPIA FIFO when
the link is configured in
non-IMA Mode and it is the
TX LINK FIFO when it is
configured in IMA Mode
Note 2: In MT90222 groups
0,1,2,3 should be used.
(1 of 8)
To RX Block
TDM RING
Control
P/S
P/S
P/S
Data Sheet
Streams
Serial
TDM Ring
Link 15
From
Link 0
Link 1