MT90222AG Zarlink Semiconductor, MT90222AG Datasheet - Page 32

• Manufacturer Part Number: MT90222AG
• Description: Description = 4 Port Ima & TC PHY For T1, E1 And DSL ;; Package Type = N/a ;; No. Of Pins =
• Manufacturer: Zarlink Semiconductor

1.0
The MT90222/3/4, supported by software, implements the ATM Forum Inverse Multiplexing for Asynchronous
Transfer Mode (IMA) Specification. Actions are implemented by the MT90222/3/4 and decisions are made by the
software. This approach minimizes the impact of any changes that might occur in the specification.
The MT90222/3/4 supports the following two major modes of operation:
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Up to eight IMA Groups can be implemented (4 groups - 0,1,2,3 for MT90222) Any of the available serial (TDM)
interfaces can be assigned dynamically to any of these IMA Groups. A different UTOPIA PHY address is assigned
to each of the IMA Groups.
The TC mode is used to transfer the cells from the UTOPIA Interface to a serial (TDM) port without any overhead.
Up to 16 UTOPIA PHY addresses can be supported in TC mode (one per serial port).
The MT90222/3/4 also supports a mixed mode where the TDM Interfaces not assigned to an IMA Group can be
used in TC mode.
The IMA implementation is divided into hardware and software functions. The MT90222/3/4 implements the
hardware functions. The software functions are implemented by the user or Zarlink IMA Core. The hardware and
software functions are described below. Notice that a number of MT90222/3/4 functions are included to assist in the
collection of statistical information. This information supports the MIB implementation.
1.1
For the MT90222/3/4 to comply with the IMA specification, the following functions must be implemented by
software:
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1.1.1
The software implemented transmit and receive LSMs are independent (i.e., each link has its own LSM). LSMs rely
on various events from: the MT90222/3/4 interface, such as cell errors, excessive delay between-links, etc.; or,
from the T1/E1/J1/DSL framer, such as Loss Of Signal (LOS), Loss Of Frame (LOF), Remote Alarm Indication
(RAI) etc.
On-chip registers are used to generate the ICP cells that communicate the LSM states at the Far End (FE).
1.1.2
The IMA GSMs and Group Traffic State Machines (GTSM) must be implemented in software. One of each state
machine should be implemented for each IMA Group.
On-chip registers are used to generate the ICP cells that communicate the various states to the FE.
the IMA mode (as defined by the ATM Forum IMA Specification), both version 1.0 and 1.1
the Transmission Convergence (TC) mode.
the transmit and receive Link State Machines (LSM)
the IMA Group State Machines (GSM)
the IMA Group Traffic State Machines (GTSM)
the Operations and Maintenance (OAM) functions
Software Functions
Device Architecture
Link State Machines
IMA Group State Machines
Zarlink Semiconductor Inc.
MT90222/3/4
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Data Sheet