UPD78F0838 Renesas Electronics Corporation., UPD78F0838 Datasheet - Page 767

• Manufacturer Part Number: UPD78F0838
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

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Notes 1. During reset signal generation or oscillation stabilization time wait, only the PC contents among the
Multiplier/divider
Stepper motor C/D
(with ZPD)
LCD controller/driver
Sound generator
Reset function
Low-voltage detector
Interrupt
2. These values vary depending on the reset source.
hardware statuses become undefined. All other hardware statuses remain unchanged after reset.
Register
RESF
LVIM
LVIS
Table 21-2. Hardware Statuses after Reset Acknowledgment (3/3)
Reset Source
WDTRF bit
LVIRF bit
Remainder data register 0 (SDR0)
Multiplication/division data registers A0 (MDA0H, MDA0L)
Multiplication/division data register B0 (MDB0)
Multiplier/divider control register 0 (DMUC0)
Timer mode control registers (MCNTC0)
Compare registers (MCMP10, MCMP11, MCMP20, MCMP21, MCMP30,
MCMP31, MCMP40, MCMP41)
Combined compare registers (MCMP1HW, MCMP2HW, MCMP3HW,
MCMP4HW)
Compare control registers (MCMPC1, MCMPC2, MCMPC3, MCMPC4)
Stepper motor port mode control register (SMPC)
ZPD detection voltage setting registers (ZPDS0, ZPDS1)
ZPD flag detection clock setting register (CMPCTL)
ZPD operational control register (ZPDEN)
LCD mode register (LCDMD)
LCD display mode register (LCDM)
LCD clock control register (LCDC0)
LCD port function registers 0, 3, ALL (LCDPF0, LCDPF3, LCDPFALL)
SG0 control register (SG0CTL)
SG0 frequency low register (SG0FL)
SG0 frequency high register (SG0FH)
SG0 volume register (SG0PWM)
Reset control flag register (RESF)
Low-voltage detection register (LVIM)
Low-voltage detection level selection register (LVIS)
Request flag registers 0L, 0H, 1L, 1H (IF0L, IF0H, IF1L, IF1H)
Mask flag registers 0L, 0H, 1L, 1H (MK0L, MK0H, MK1L, MK1H)
Priority specification flag registers 0L, 0H, 1L, 1H (PR0L, PR0H, PR1L,
PR1H)
External interrupt rising edge enable register (EGP)
External interrupt falling edge enable register (EGN)
Cleared (0)
Cleared (00H)
RESET Input
Preliminary User’s Manual U19748EJ1V0UD
CHAPTER 21 RESET FUNCTION
Hardware
Cleared (0)
Cleared (00H)
Reset by POC
Set (1)
Held
Cleared (00H)
Reset by WDT
Held
Set (1)
Held
Reset by LVI
0000H
0000H
0000H
00H
00H
00H
0000H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
0000H
0000H
0000H
00H
00H
00H
00H
FFH
FFH
00H
00H
Acknowledgment
Status after Reset
Note 2
Note 2
Note 2
Note 1
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