UPD78F0838 Renesas Electronics Corporation., UPD78F0838 Datasheet - Page 385

• Manufacturer Part Number: UPD78F0838
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

<R>
<R>
Cautions 1.
Figure 12-7. Format of Asynchronous Serial Interface Operation Mode Register 60 (ASIM60) (2/2)
Note If “reception as 0 parity” is selected, the parity is not judged.
PS610
CL60
SL60
0
0
1
1
0
1
0
1
2.
3.
4.
5.
6.
7.
8.
9.
asynchronous serial interface reception error status register 60 (ASIS60) is not set and the error
interrupt does not occur.
Be sure to set bit 0 to 1.
To start the transmission, set POWER60 to 1 and then set TXE60 to 1. To stop the
transmission, clear TXE60 to 0, and then clear POWER60 to 0.
To start the reception, set POWER60 to 1 and then set RXE60 to 1. To stop the reception,
clear RXE60 to 0, and then clear POWER60 to 0.
Set POWER60 to 1 and then set RXE60 to 1 while a high level is input to the RxD60 pins. If
POWER60 is set to 1 and RXE60 is set to 1 while a low level is input, reception is started.
TXE60 and RXE60 are synchronized by the base clock (f
transmission or reception again, set TXE60 or RXE60 to 1 at least two clocks of the base
clock after TXE60 or RXE60 has been cleared to 0. If TXE60 or RXE60 is set within two clocks
of the base clock, the transmission circuit or reception circuit may not be initialized.
Set transmit data to TXB60 at least one base clock (f
Clear the TXE60 and RXE60 bits to 0 before rewriting the PS610, PS600, and CL60 bits.
Fix the PS610 and PS600 bits to 0 when used in LIN communication operation.
Clear TXE60 to 0 before rewriting the SL60 bit. Reception is always performed with “the
number of stop bits = 1”, and therefore, is not affected by the set value of the SL60 bit.
Character length of data = 7 bits
Character length of data = 8 bits
Number of stop bits = 1
Number of stop bits = 2
PS600
0
1
0
1
CHAPTER 12 SERIAL INTERFACES UART60 AND UART61
Does not output parity bit.
Outputs 0 parity.
Outputs odd parity.
Outputs even parity.
Preliminary User’s Manual U19748EJ1V0UD
Transmission operation
Specifies character length of transmit/receive data
Specifies number of stop bits of transmit data
Reception without parity
Reception as 0 parity
Judges as odd parity.
Judges as even parity.
XCLK6
) after setting TXE60 = 1.
XCLK6
Reception operation
Therefore, bit 2 (PE60) of
) set by CKSR60. To enable
Note
383