UPD78F0838 Renesas Electronics Corporation., UPD78F0838 Datasheet - Page 747
UPD78F0838
Manufacturer Part Number
UPD78F0838
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD78F0838.pdf
(917 pages)
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Item
System clock
CPU
Flash memory
RAM
Regulator
Port (latch)
16-bit timer/event
counter
8-bit timer/event
counter
Watch timer
Watchdog timer
Clock output
Buzzer output
A/D converter
Serial interface
FCAN controller
Multiplier/divider
Stepper motor C/D (with ZPD)
LCD C/D
Sound generator
Power-on-clear function
Low-voltage detection function
External interrupt
Main system clock
Subsystem clock
f
OSC
HALT Mode Setting
UART60
UART61
CSI10
CSI11
IIC0
f
f
f
f
f
TMP0
TMP1
TMP2
TMP3
TMP4
TM50
TM51
OSC8
X
EXT
XT
EXTS
Clock supply to the CPU is stopped
Operation continues (cannot
be stopped)
Status before HALT mode
was set is retained
Operates or stops by external clock input
Status before HALT mode was set is retained
Status before HALT mode was set is retained
Status before HALT mode was set is retained. Operation continues (cannot be stopped) when
“internal low-speed oscillator cannot be stopped by software” is set by option byte.
Operation stopped
Operation stopped
Status before HALT mode was set is retained
Operates in normal mode
Status before HALT mode was set is retained
Operable
Operable. Clock supply to watchdog timer stops when “internal low-speed oscillator can be
stopped by software” is set by option byte.
Operable
Table 20-1. Operating Statuses in HALT Mode (1/2)
When CPU Is Operating on
Oscillation Clock (f
Internal High-Speed
When HALT Instruction Is Executed While CPU Is Operating on Main System Clock
CHAPTER 20 STANDBY FUNCTION
Preliminary User’s Manual U19748EJ1V0UD
OSC8
)
Status before HALT mode was set is retained
Operation continues (cannot
be stopped)
When CPU Is Operating on
X1 Clock (f
X
)
Status before HALT mode
was set is retained
be stopped)
Operation continues (cannot
External Main System Clock
When CPU Is Operating on
(f
EXT
)
745
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